Gerard Marull-Paretas 68799d507d arch: riscv: make __soc_is_irq optional ... It looks like all SoCs in tree check if an exception comes from an IRQ the same way, so let's provide a common logic by default, still customizable if the SoC selects RISCV_SOC_ISR_CHECK. Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>		2024-01-23 09:57:57 +01:00
..
arc	arch: arc: use sys_cache instead of arch-function for enabling the cache	2024-01-10 09:59:58 +01:00
arm	arch: arm: core: cortex_m: fix cache disabling in init_arch_hw_at_boot	2024-01-10 09:59:58 +01:00
arm64	arch: smp: make flush_fpu_ipi a common, optional interfaces	2024-01-09 10:00:17 +01:00
common	arch: common: multilevel irq: verify interrupt level bits configuration	2023-12-08 08:40:41 -05:00
mips	arch: mips: use LOG_ERR to print exceptions	2023-12-14 09:32:27 +01:00
nios2	arch: guard more code with CONFIG_EXCEPTION_DEBUG	2023-12-14 09:32:27 +01:00
posix	posix: sched: Implement get APIs for scheduling parameters	2024-01-15 09:57:44 +01:00
riscv	arch: riscv: make __soc_is_irq optional	2024-01-23 09:57:57 +01:00
sparc	arch: guard more code with CONFIG_EXCEPTION_DEBUG	2023-12-14 09:32:27 +01:00
x86	x86: add CODE_UNREACHABLE to z_x86_cpu_init	2024-01-17 11:57:20 -05:00
xtensa	xtensa: mmu: Optimize autorefill invalidation	2024-01-19 13:50:02 +01:00
CMakeLists.txt
Kconfig	xtensa: do not imply atomic ops kconfig	2024-01-18 11:29:11 -05:00