There is an issue on the SHI hardware peripheral to detect CS rising/failing with bits CSnFE/CSnRE in the EVSTAT2 register in npcx9m7fb chip. This commit workarounds it by using MIWU to detect the CS rising and failing. Signed-off-by: Tom Chang <CHChang19@nuvoton.com> Signed-off-by: Jun Lin <CHLin56@nuvoton.com> |
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| .. | ||
| CMakeLists.txt | ||
| ec_host_cmd_backend_espi.c | ||
| ec_host_cmd_backend_shi_ite.c | ||
| ec_host_cmd_backend_shi_npcx.c | ||
| ec_host_cmd_backend_shi.h | ||
| ec_host_cmd_backend_simulator.c | ||
| ec_host_cmd_backend_spi_stm32.c | ||
| ec_host_cmd_backend_uart.c | ||
| Kconfig | ||