Tomasz Lissowski 61cb7d4358 adsp: hda: accept 16 byte alignment for HDA buffer size ... HDA DMA driver uses an excessive value of 128 bytes as required alignment for DMA buffer size. This may result in the correct buffer size (e.g. 32-byte aligned, which is DT-compliant) being silently truncated before writing it into DGBS register. This patch changes the requirement to the value implied by DGBS register format (effectively reduces to 16 bytes). Signed-off-by: Tomasz Lissowski <tomasz.lissowski@intel.com>		2024-01-03 18:59:55 +00:00
..
arc	arch: introduce DSP_SHARING and CPU_HAS_DSP configs	2023-11-27 09:05:54 +00:00
arm	soc: arm: atmel_sam: Sys_arch_reboot using RSTC	2023-12-28 12:05:53 +00:00
arm64	imx8m: auto generate mmu_regions array from dt compatiable	2023-12-27 16:09:42 +00:00
mips
nios2	cmake: cleanup and simplify the standard include logic in Zephyr	2023-11-06 18:57:30 -05:00
posix	soc: posix: fix kconfig description	2023-12-18 10:11:18 +01:00
riscv	drivers: usb: usb_dc_it82xx2: optimize the basic/extend endpoints control	2023-12-20 11:15:38 +01:00
sparc
x86	soc: x86: raptor_lake: soc_gpio : Modified to support RPL-P	2023-12-27 16:06:19 +00:00
xtensa	adsp: hda: accept 16 byte alignment for HDA buffer size	2024-01-03 18:59:55 +00:00
CMakeLists.txt
Kconfig