f786ecc075
This adds data cache manipulations, flushing and invalidation, to the tests where buffer content are being written and compared. These tests map different virtual pages to the same physical pages, and write to one of the mapped virtual addresses. Some SoCs may cache the virtual address separately and writes to one virtual address will not be reflected to another virtual address, this failing the comparison. So we need to manually flush the cache after writing to the buffer, and invalidating cache before reading. Note that not all reads and writes need this treatment as some of them only needs to test for access permissions, and not the memory content. Signed-off-by: Daniel Leung <daniel.leung@intel.com> |
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| .. | ||
| demand_paging | ||
| futex | ||
| mem_map | ||
| mem_protect | ||
| obj_validation | ||
| protection | ||
| stack_random | ||
| stackprot | ||
| sys_sem | ||
| syscalls | ||
| userspace | ||