Add disabled qdec subnodes to timers TIM1 through TIM5 and TIM8 for STM32F2 series MCUs. This enables Zephyr to provide consistent QDEC support across all supported encoder-capable STM32 timers. Signed-off-by: Amaan Singh <amaansingh160@gmail.com> |
||
|---|---|---|
| .. | ||
| arc/synopsys | ||
| arm | ||
| arm64 | ||
| bindings | ||
| common | ||
| nios2/intel | ||
| posix | ||
| riscv | ||
| sparc/gaisler | ||
| vendor | ||
| x86/intel | ||
| xtensa | ||
| binding-template.yaml | ||
| Kconfig | ||