Not all xtensa targets define the top of usable RAM via the _heap_sentry address; it looks like the list is limited to esp32, esp32s2, esp32s3 and intel parts. The first three all define HAS_ESPRESSIF_HAL, so key the test using that or SOC_FAMILY_INTEL_ADSP. Signed-off-by: Keith Packard <keithp@keithp.com> |
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