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zephyr/arch
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Abramo Bagnara ad8778d019 coding guidelines: comply with MISRA C:2012 Rule 4.1 
MISRA C:2012 Rule 4.1 (Octal and hexadecimal escape sequences shall be
terminated.)

Use string literal concatenation to properly terminate hexadecimal
escape sequences.

Signed-off-by: Abramo Bagnara <abramo.bagnara@bugseng.com>
Signed-off-by: Simon Hein <SHein@baumer.com>
2022-06-30 19:51:59 -04:00
..
arc arc: vector_table: Automatically place the IRQ vector table 2022-06-28 12:29:42 +02:00
arm modules: tfm: Allow enabling FPU in the application with TF-M enabled 2022-06-29 14:45:39 +00:00
arm64 arch: arm64: enable single thread support config 2022-06-29 10:27:55 +02:00
common irq: Fix IRQ vector table relocation 2022-06-28 12:29:42 +02:00
mips asm: update files with <zephyr/...> include prefix 2022-05-09 12:45:29 -04:00
nios2 asm: update files with <zephyr/...> include prefix 2022-05-09 12:45:29 -04:00
posix include: add more missing zephyr/ prefixes 2022-05-27 15:20:27 -07:00
riscv riscv: pmp: properly initialize per-thread m-mode/u-mode entry array 2022-06-23 15:56:00 -05:00
sparc asm: update files with <zephyr/...> include prefix 2022-05-09 12:45:29 -04:00
x86 coding guidelines: comply with MISRA C:2012 Rule 4.1 2022-06-30 19:51:59 -04:00
xtensa debug: coredump: add xtensa intel adsp, support toolchains 2022-06-23 15:44:45 -04:00
CMakeLists.txt
Kconfig arch: Use a more sane ALIGN value 2022-06-28 12:29:42 +02:00