This is just a stub with bits of information about RISC-V support on Zephyr, that can and should be improved over time. Signed-off-by: Ederson de Souza <ederson.desouza@intel.com> |
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| .. | ||
| arc-support-status.rst | ||
| arm_cortex_m.rst | ||
| index.rst | ||
| risc-v.rst | ||
| semihost.rst | ||
| x86.rst | ||