zephyr/soc/intel
Kai Vehmanen fa798ce2d5 soc: intel_adsp: only implement FW_STATUS boot protocol for cavs
The software protocol to write status value of 0x05 (FW_ENTERED)
into memory window 0 at Zephyr boot, is not needed in the ace1.x
boot flow and does not match the semantics host systems are expecting
at this location in the memory window (e.g. write of 0x05 is not
expected).

Make this logic specific to intel_adsp_cavs platforms and move the code
out from common intel_adsp code.

This commit depends on update to cavstool.py to use correct
ROM status register to observe boot state.

Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2024-05-27 08:16:10 -07:00
..
alder_lake soc: x86: add gpio acpi resource enumeration 2024-04-22 06:50:38 -07:00
apollo_lake
atom
common soc: x86: add gpio acpi resource enumeration 2024-04-22 06:50:38 -07:00
elkhart_lake
intel_adsp soc: intel_adsp: only implement FW_STATUS boot protocol for cavs 2024-05-27 08:16:10 -07:00
intel_ish
intel_niosv
intel_socfpga
intel_socfpga_std kernel: mmu: abstract access to page frame flags and address 2024-05-13 16:04:40 -04:00
lakemont
raptor_lake soc: x86: add gpio acpi resource enumeration 2024-04-22 06:50:38 -07:00