Daniel Fuchs f0fee215ab soc: introduce the EFR32MG24B210F1536IM48 ... The EFR32MG24B210F1536IM48 has 4 more GPIOs than the EFR32MG24B310F1536IM48, and does not support the high accuracy mode for the IADC. Signed-off-by: Daniel Fuchs <software@sagacioussuricata.com>		2024-12-30 08:43:12 +01:00
..
arc/synopsys
arm	soc: introduce the EFR32MG24B210F1536IM48	2024-12-30 08:43:12 +01:00
arm64	dts: arm64: imx8mn: add GPIO device nodes	2024-12-24 11:15:26 +01:00
bindings	drivers: stepper: tmc2209: Allow counter dts property	2024-12-28 04:37:05 +01:00
common	style: Inconsistent macro names changed	2024-12-25 12:40:56 +01:00
nios2/intel
posix
riscv	soc: esp32c6: Add GP timers support	2024-12-21 05:52:20 +01:00
sparc/gaisler
x86/intel	dts/x86: use proper unit-address values	2024-11-18 13:18:53 -05:00
xtensa	dts: xtensa: Fix gpio-reserved-ranges of gpio1	2024-12-26 15:31:43 +01:00
binding-template.yaml
Kconfig