2ca2a34669
Add power state property binding and include this property in cpu. The pm-state attribute is a enum that matches with enum pm_state right now the only timing attribute is the minimum residency that is the minimum time for a power state be worthwhile. Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com> |
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| .. | ||
| altr,nios2f.yaml | ||
| arm,cortex-a53.yaml | ||
| arm,cortex-a72.yaml | ||
| arm,cortex-m0.yaml | ||
| arm,cortex-m0+.yaml | ||
| arm,cortex-m1.yaml | ||
| arm,cortex-m3.yaml | ||
| arm,cortex-m4.yaml | ||
| arm,cortex-m4f.yaml | ||
| arm,cortex-m7.yaml | ||
| arm,cortex-m23.yaml | ||
| arm,cortex-m33.yaml | ||
| arm,cortex-m33f.yaml | ||
| arm,cortex-r4.yaml | ||
| arm,cortex-r4f.yaml | ||
| arm,cortex-r5.yaml | ||
| arm,cortex-r5f.yaml | ||
| cadence,tensilica-xtensa-lx4.yaml | ||
| cadence,tensilica-xtensa-lx6.yaml | ||
| cpu.yaml | ||
| qemu,nios2-zephyr.yaml | ||
| sample_controller.yaml | ||
| snps,arcem.yaml | ||