zephyr/soc
Flavio Ceolin 665812f994 xtensa: intel_adsp: Lock vecbase after initial setup
Lock the vecbase register after the hw initialization.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2023-05-12 06:01:46 -04:00
..
arc ARC: Add HS4x support 2023-05-02 16:54:24 +02:00
arm soc: arm: nxp_imx: add KConfig definitions for RT1042 2023-05-11 10:35:40 -05:00
arm64 soc: Only select HAS_SEGGER_RTT if module is available 2023-04-20 14:57:51 +02:00
mips
nios2
posix soc_inf: Refactor native tasks into own header 2023-04-13 13:35:20 +02:00
riscv riscv: Microchip Mi-V should use built-in atomic operations 2023-05-09 13:04:27 +02:00
sparc
x86 boards: rpl_crb: Indicate support for SMBus 2023-04-04 08:15:00 -04:00
xtensa xtensa: intel_adsp: Lock vecbase after initial setup 2023-05-12 06:01:46 -04:00
Kconfig nrf52_bsim: Convert from a nRF52832 to a nRF52833 2023-01-26 09:29:18 +01:00