eebb17ca52
The Designware FIFO is filled in units of 32 bit words, but the buffer we are passed is not guaranteed to be a multiple of 4 bytes long, nor aligned on a 4-byte boundary. So in theory we are reading 0-3 bytes of unused garbage from the end of the array. That's currently benign on supported platforms with this hardware, which all support misaligned reads. But not all do. And the incoming arrival of memory protection opens the possibility that those extra bytes would cross a protection boundary and cause a crash or security bug. Do this right. (Note that this is fixed to little endian byte order. The Designware databook is frustratingly silent on the endianness it expects, but existing hardware I can see is definitely LE and I see a few spots in the Linux dwc2 driver that likewise assume LE). Signed-off-by: Andy Ross <andrew.j.ross@intel.com> |
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