Michal Sieron 7b601b7f50 dts: riscv: litex-vexriscv: Fix clock node address ... Also change its register indentation from spaces to tabs Signed-off-by: Michal Sieron <msieron@internships.antmicro.com>		2022-05-27 15:27:11 -07:00
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arc/synopsys	ARC: boards: HSDK: ged rid of pinmux usage	2022-05-18 17:20:26 +02:00
arm	include: add more missing zephyr/ prefixes	2022-05-27 15:20:27 -07:00
arm64	boards: imx8mp: partial pin control support	2022-05-12 16:57:17 -05:00
bindings	drivers/sensor: lsm6dso: Add support for lsm6dso32	2022-05-25 13:16:04 -07:00
common	dts/arm: stm32: Add clocks nodes on stm32wb,l4 and stm32f4 series	2021-04-27 11:53:37 +02:00
nios2/intel	dts: nios2: intel: Move SoC devicetree includes under a vendor directory	2022-05-09 17:54:48 -04:00
posix
riscv	dts: riscv: litex-vexriscv: Fix clock node address	2022-05-27 15:27:11 -07:00
sparc/gaisler	dts: sparc: gaisler: Move SoC devicetree includes under a vendor dir	2022-05-09 17:54:48 -04:00
x86/intel	dts: x86: intel: Move SoC devicetree includes under a vendor directory	2022-05-09 17:54:48 -04:00
xtensa	esp32/s2/c3: pinctrl: dts: move pinctrl node out of SoC bus	2022-05-13 11:25:58 -07:00
binding-template.yaml	doc: devicetree: overhaul bindings guide	2021-04-22 15:32:10 +02:00
Kconfig