zephyr/dts/riscv
HaiLong Yang 9bb8ae9f13 dts: introduce gd32 adc
Add support for gd32 adc.

Signed-off-by: HaiLong Yang <hailong.yang@brainco.cn>
2022-07-04 09:48:32 +02:00
..
andes dts: riscv: andes: Move SoC devicetree includes under a vendor directory 2022-05-09 17:54:48 -04:00
espressif dts: esp32: full ledc configuration in binding 2022-06-29 14:48:25 +00:00
gigadevice dts: introduce gd32 adc 2022-07-04 09:48:32 +02:00
ite dts: add reg-shift property to all ns16550 devices 2022-06-15 16:59:02 -05:00
microsemi dts: riscv: microsemi: Move SoC devicetree includes under a vendor dir 2022-05-09 17:54:48 -04:00
openisa dts: riscv: openisa: Move SoC devicetree includes under a vendor dir 2022-05-09 17:54:48 -04:00
sifive dts: bindings: riscv: Don't use riscv, prefix for vendor compat 2022-06-16 11:26:25 +02:00
starfive dts: migrate includes to <zephyr/...> 2022-05-06 19:54:54 +02:00
telink dts: riscv: telink: Move SoC devicetree includes under a vendor dir 2022-05-09 17:54:48 -04:00
mpfs-icicle.dtsi dts: riscv: introduce Polarfire SOC QSPI interface 2022-05-06 11:32:54 +02:00
neorv32.dtsi dts: migrate includes to <zephyr/...> 2022-05-06 19:54:54 +02:00
riscv32-litex-vexriscv.dtsi dts: riscv: litex-vexriscv: Fix clock node address 2022-05-27 15:27:11 -07:00
virt.dtsi