zephyr/arch
Stephanos Ioannidis 7751fbca44 arch: riscv: Align semihost_exec function at 16-byte boundary
QEMU requires that the semihosting trap instruction sequence, which
consists of three uncompressed instructions, lie in the same page, and
refuses to interpret the trap sequence if these instructions are placed
across two different pages.

This commit adds 16-byte alignment requirement to the `semihost_exec`
function, which occupies 12 bytes, to ensure that the three trap
sequence instructions in this function are never placed across two
different pages.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2022-08-08 10:52:34 +02:00
..
arc arch: arc: remove unused <soc.h> 2022-08-03 07:46:14 -04:00
arm arch: introduce config DCLS 2022-08-04 12:51:25 +09:00
arm64 test,arch: fix few odd suffix include paths 2022-07-18 14:44:47 -04:00
common gen_isr_tables.py: Move to scripts directory 2022-07-07 17:58:34 +00:00
mips arch: mips: add mising braces to single line if statements 2022-07-06 11:00:45 -04:00
nios2 arch: comply to coding guidelines MISRA C:2012 Rule 14.4 2022-07-20 09:28:38 -05:00
posix scripts: move user_wordsize.py to scripts/build/user_wordsize.py 2022-07-12 10:03:45 +02:00
riscv arch: riscv: Align semihost_exec function at 16-byte boundary 2022-08-08 10:52:34 +02:00
sparc SPARC: reduce z_thread_entry_wrapper 2022-08-03 12:05:49 +02:00
x86 arch: x86: Fix wrong identation 2022-08-07 14:27:56 +01:00
xtensa intel_adsp: meteorlake: Initialize stack flush pointer SR 2022-07-25 16:00:22 -04:00
CMakeLists.txt cmake: fix include directories to work with out-of-tree arch 2020-08-05 08:06:07 -04:00
Kconfig arch: introduce config DCLS 2022-08-04 12:51:25 +09:00