Tim Lin ad2dc064a7 ITE: soc: it81xx2: Add new variant of it81xx2cx related configuration ... Add new variant configuration of it81202cx and it81302cx. This cx variant of it81xx2 changes are as follows: 1. SRAM size will increase from 60k to 128k. 2. Configurable ILM size is still 60k. 3. Support M extension of RISC-V. Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>		2022-12-02 11:29:00 +01:00
..
andes	dts: bindings: spi: add andes spi driver	2022-09-07 15:34:47 +02:00
espressif	dts: riscv: espressif: esp32c3: add TWAI node	2022-10-14 09:55:09 +02:00
gigadevice	dts: Add watchdog configuration for GD32 SoCs	2022-10-03 18:07:16 +02:00
ite	ITE: soc: it81xx2: Add new variant of it81xx2cx related configuration	2022-12-02 11:29:00 +01:00
microsemi	dts: riscv: microsemi-miv: define CLINT	2022-08-02 09:12:31 +02:00
openisa	dts: riscv: Remove label property from devicetrees	2022-07-26 12:57:23 -05:00
sifive	dts: riscv: sifive: use sifive,clint0	2022-08-02 09:12:31 +02:00
starfive	dts: riscv: starfive: align clint description with Linux	2022-08-02 09:12:31 +02:00
telink	dts: riscv: telink: add DT entry for machine timer	2022-08-02 09:12:31 +02:00
mpfs-icicle.dtsi	include: add missing zephyr/ prefixes	2022-08-02 18:03:58 +01:00
neorv32.dtsi	dts: riscv: neorv32: define machine timer	2022-08-02 09:12:31 +02:00
riscv32-litex-vexriscv.dtsi	dts: riscv: Remove label property from devicetrees	2022-07-26 12:57:23 -05:00
virt.dtsi	dts: riscv: virt: use sifive,clint0	2022-08-02 09:12:31 +02:00