794656913b
When MPU is enabled, the sections need to be 64 bytes aligned. In the case of MMU, BSS section will be 4k aligned, because the first variable in BSS section 'base_xlat_table' is explicitly aligned by '__aligned(NUM_BASE_LEVEL_ENTRIES * sizeof(uint64_t))'. However, with MPU, we do not have such a variable. So it's necessary to fix the alignment of the BSS section in the linker.ld Signed-off-by: Jaxson Han <jaxson.han@arm.com> |
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| .. | ||
| arc | ||
| arm/aarch32 | ||
| arm64 | ||
| common | ||
| nios2 | ||
| posix | ||
| riscv | ||
| sparc | ||
| x86 | ||
| xtensa | ||
| arch_inlines.h | ||
| cpu.h | ||
| syscall.h | ||