zephyr/dts/bindings/timer
Georgij Cernysiov 063e9447e0 dts: bindings: timer: stm32: lptim exclude countermode
LPTIMER has a different `countermode` meaning.
We shall exclude introduced property from lptim bindings.

Alternative property (e.g. `external-mode`) can be added
later on to support external counter mode.

Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
2022-04-15 11:59:16 -07:00
..
arm,armv8-timer.yaml
arm,cmsdk-dtimer.yaml
arm,cmsdk-timer.yaml
atmel,sam0-tc32.yaml drivers: timer: Add sam0 tc32 support to pinctrl 2022-03-24 15:45:37 -07:00
atmel,sam-tc.yaml drivers: counter: Update sam driver to use pinctrl 2022-03-24 15:45:37 -07:00
espressif,esp32-systimer.yaml
gaisler,gptimer.yaml
gd,gd32-timer.yaml dts: bindings: timer: add gd,gd32-timer 2022-01-07 14:58:27 -06:00
intel,hpet.yaml timer: hpet: make legacy interrupt routing optional 2022-01-14 14:46:21 -05:00
ite,it8xxx2-timer.yaml
litex,timer0.yaml
microchip,xec-rtos-timer.yaml
nordic,nrf-timer.yaml
nuvoton,npcx-itim-timer.yaml
nxp,imx-gpt.yaml
nxp,lpc-ctimer.yaml
openisa,rv32m1-lptmr.yaml
renesas,rcar-cmt.yaml
riscv,machine-timer.yaml dts: bindings: timer: Correct compatible name of riscv,machine-timer 2022-01-14 09:49:53 -06:00
silabs,gecko-timer.yaml
st,stm32-lptim.yaml dts: bindings: timer: stm32: lptim exclude countermode 2022-04-15 11:59:16 -07:00
st,stm32-timers.yaml dts: bindings: timer: stm32: add countermode 2022-04-15 11:59:16 -07:00
xlnx,ttcps.yaml