zephyr/tests/drivers/uart
Fabrice DJIATSA 7900f8d4ee tests: drivers: uart: async_api: update wba55cg clock frequency
With the current configuration, we encounter a user setting error
during the test with the log:
"Wrong number of bytes received, got: 2, expected: 3."

Workaround:
Increase the clock frequency to enable faster data transmission
and avoid user setting errors.

Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
2025-06-26 11:13:30 +02:00
..
uart_async_api tests: drivers: uart: async_api: update wba55cg clock frequency 2025-06-26 11:13:30 +02:00
uart_async_dual drivers: serial: nrfx_uarte: assert clock control enabled 2025-06-13 11:12:43 +02:00
uart_async_rx
uart_basic_api tests: drivers: serial: Add support for Renesas RZ/G2UL-SMARC 2025-06-09 10:26:45 +01:00
uart_elementary tests, samples: update esp32_devkitc board records 2025-04-29 16:48:55 +02:00
uart_emul
uart_errors tests: Add BL54L15/L15u DVK support 2025-04-23 15:02:20 +02:00
uart_mix_fifo_poll tests: Add BL54L15/L15u DVK support 2025-04-23 15:02:20 +02:00
uart_pm tests: Add BL54L15/L15u DVK support 2025-04-23 15:02:20 +02:00