d4dd928eaa
This is a public macro which calculates the size to be allocated for stacks inside a stack array. This is necessitated because of some internal padding (e.g. for MPU scenarios). This is particularly useful when a reference to K_THREAD_STACK_ARRAY_DEFINE needs to be made from within a struct. Signed-off-by: Rajavardhan Gundi <rajavardhan.gundi@intel.com>
388 lines
11 KiB
C
388 lines
11 KiB
C
/*
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* Copyright (c) 2014 Wind River Systems, Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @file
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* @brief ARC specific kernel interface header
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*
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* This header contains the ARC specific kernel interface. It is
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* included by the kernel interface architecture-abstraction header
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* include/arch/cpu.h)
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*/
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#ifndef _ARC_ARCH__H_
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#define _ARC_ARCH__H_
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include <generated_dts_board.h>
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#include <sw_isr_table.h>
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#ifdef CONFIG_CPU_ARCV2
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#include <arch/arc/v2/exc.h>
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#include <arch/arc/v2/irq.h>
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#include <arch/arc/v2/ffs.h>
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#include <arch/arc/v2/error.h>
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#include <arch/arc/v2/misc.h>
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#include <arch/arc/v2/aux_regs.h>
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#include <arch/arc/v2/arcv2_irq_unit.h>
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#include <arch/arc/v2/asm_inline.h>
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#include <arch/arc/v2/addr_types.h>
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#endif
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#if defined(CONFIG_MPU_STACK_GUARD) || defined(CONFIG_USERSPACE)
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#if defined(CONFIG_ARC_CORE_MPU)
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#if CONFIG_ARC_MPU_VER == 2
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/*
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* The minimum MPU region of MPU v2 is 2048 bytes. The
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* start address of MPU region should be aligned to the
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* region size
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*/
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/* The STACK_GUARD_SIZE is the size of stack guard region */
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#define STACK_ALIGN 2048
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#elif CONFIG_ARC_MPU_VER == 3
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#define STACK_ALIGN 32
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#else
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#error "Unsupported MPU version"
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#endif /* CONFIG_ARC_MPU_VER */
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#else /* CONFIG_ARC_CORE_MPU */
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#error "Requires to enable MPU"
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#endif
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#else /* CONFIG_MPU_STACK_GUARD || CONFIG_USERSPACE */
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#define STACK_ALIGN 4
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#endif
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#if defined(CONFIG_MPU_STACK_GUARD)
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#if CONFIG_ARC_MPU_VER == 2
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#define STACK_GUARD_SIZE 2048
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#elif CONFIG_ARC_MPU_VER == 3
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#define STACK_GUARD_SIZE 32
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#endif
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#else /* CONFIG_MPU_STACK_GUARD */
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#define STACK_GUARD_SIZE 0
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#endif /* CONFIG_MPU_STACK_GUARD */
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#define STACK_SIZE_ALIGN(x) max(STACK_ALIGN, x)
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/**
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* @brief Calculate power of two ceiling for a buffer size input
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*
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*/
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#define POW2_CEIL(x) ((1 << (31 - __builtin_clz(x))) < x ? \
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1 << (31 - __builtin_clz(x) + 1) : \
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1 << (31 - __builtin_clz(x)))
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#if defined(CONFIG_USERSPACE)
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#if CONFIG_ARC_MPU_VER == 2
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#define _ARCH_THREAD_STACK_DEFINE(sym, size) \
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struct _k_thread_stack_element __kernel_noinit \
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__aligned(POW2_CEIL(STACK_SIZE_ALIGN(size))) \
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sym[POW2_CEIL(STACK_SIZE_ALIGN(size)) + \
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+ STACK_GUARD_SIZE + CONFIG_PRIVILEGED_STACK_SIZE]
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#define _ARCH_THREAD_STACK_LEN(size) \
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(POW2_CEIL(STACK_SIZE_ALIGN(size)) + \
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max(POW2_CEIL(STACK_SIZE_ALIGN(size)), \
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POW2_CEIL(STACK_GUARD_SIZE + CONFIG_PRIVILEGED_STACK_SIZE)))
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#define _ARCH_THREAD_STACK_ARRAY_DEFINE(sym, nmemb, size) \
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struct _k_thread_stack_element __kernel_noinit \
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__aligned(POW2_CEIL(STACK_SIZE_ALIGN(size))) \
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sym[nmemb][_ARCH_THREAD_STACK_LEN(size)]
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#define _ARCH_THREAD_STACK_MEMBER(sym, size) \
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struct _k_thread_stack_element \
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__aligned(POW2_CEIL(STACK_SIZE_ALIGN(size))) \
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sym[POW2_CEIL(size) + \
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+ STACK_GUARD_SIZE + CONFIG_PRIVILEGED_STACK_SIZE]
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#elif CONFIG_ARC_MPU_VER == 3
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#define _ARCH_THREAD_STACK_DEFINE(sym, size) \
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struct _k_thread_stack_element __kernel_noinit __aligned(STACK_ALIGN) \
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sym[size + \
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+ STACK_GUARD_SIZE + CONFIG_PRIVILEGED_STACK_SIZE]
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#define _ARCH_THREAD_STACK_LEN(size) \
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((size) + STACK_GUARD_SIZE + CONFIG_PRIVILEGED_STACK_SIZE)
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#define _ARCH_THREAD_STACK_ARRAY_DEFINE(sym, nmemb, size) \
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struct _k_thread_stack_element __kernel_noinit __aligned(STACK_ALIGN) \
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sym[nmemb][_ARCH_THREAD_STACK_LEN(size)]
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#define _ARCH_THREAD_STACK_MEMBER(sym, size) \
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struct _k_thread_stack_element __aligned(STACK_ALIGN) \
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sym[size + \
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+ STACK_GUARD_SIZE + CONFIG_PRIVILEGED_STACK_SIZE]
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#endif /* CONFIG_ARC_MPU_VER */
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#define _ARCH_THREAD_STACK_SIZEOF(sym) \
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(sizeof(sym) - CONFIG_PRIVILEGED_STACK_SIZE - STACK_GUARD_SIZE)
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#define _ARCH_THREAD_STACK_BUFFER(sym) \
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((char *)(sym))
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#else /* CONFIG_USERSPACE */
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#define _ARCH_THREAD_STACK_DEFINE(sym, size) \
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struct _k_thread_stack_element __kernel_noinit __aligned(STACK_ALIGN) \
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sym[size + STACK_GUARD_SIZE]
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#define _ARCH_THREAD_STACK_LEN(size) ((size) + STACK_GUARD_SIZE)
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#define _ARCH_THREAD_STACK_ARRAY_DEFINE(sym, nmemb, size) \
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struct _k_thread_stack_element __kernel_noinit __aligned(STACK_ALIGN) \
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sym[nmemb][_ARCH_THREAD_STACK_LEN(size)]
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#define _ARCH_THREAD_STACK_MEMBER(sym, size) \
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struct _k_thread_stack_element __aligned(STACK_ALIGN) \
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sym[size + STACK_GUARD_SIZE]
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#define _ARCH_THREAD_STACK_SIZEOF(sym) (sizeof(sym) - STACK_GUARD_SIZE)
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#define _ARCH_THREAD_STACK_BUFFER(sym) ((char *)(sym + STACK_GUARD_SIZE))
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#endif /* CONFIG_USERSPACE */
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#ifdef CONFIG_USERSPACE
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#ifdef CONFIG_ARC_MPU
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#ifndef _ASMLANGUAGE
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#include <arch/arc/v2/mpu/arc_mpu.h>
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#define K_MEM_PARTITION_P_NA_U_NA AUX_MPU_RDP_N
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#define K_MEM_PARTITION_P_RW_U_RW (AUX_MPU_RDP_UW | AUX_MPU_RDP_UR | \
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AUX_MPU_RDP_KW | AUX_MPU_RDP_KR)
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#define K_MEM_PARTITION_P_RW_U_RO (AUX_MPU_RDP_UR | \
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AUX_MPU_RDP_KW | AUX_MPU_RDP_KR)
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#define K_MEM_PARTITION_P_RW_U_NA (AUX_MPU_RDP_KW | AUX_MPU_RDP_KR)
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#define K_MEM_PARTITION_P_RO_U_RO (AUX_MPU_RDP_UR | AUX_MPU_RDP_KR)
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#define K_MEM_PARTITION_P_RO_U_NA (AUX_MPU_RDP_KR)
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/* Execution-allowed attributes */
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#define K_MEM_PARTITION_P_RWX_U_RWX (AUX_MPU_RDP_UW | AUX_MPU_RDP_UR | \
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AUX_MPU_RDP_KW | AUX_MPU_RDP_KR | \
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AUX_MPU_RDP_KE | AUX_MPU_RDP_UE)
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#define K_MEM_PARTITION_P_RWX_U_RX (AUX_MPU_RDP_UR | \
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AUX_MPU_RDP_KW | AUX_MPU_RDP_KR | \
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AUX_MPU_RDP_KE | AUX_MPU_RDP_UE)
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#define K_MEM_PARTITION_P_RX_U_RX (AUX_MPU_RDP_UR | \
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AUX_MPU_RDP_KR | \
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AUX_MPU_RDP_KE | AUX_MPU_RDP_UE)
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#define K_MEM_PARTITION_IS_WRITABLE(attr) \
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({ \
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int __is_writable__; \
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attr &= (AUX_MPU_RDP_UW | AUX_MPU_RDP_KW); \
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switch (attr) { \
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case (AUX_MPU_RDP_UW | AUX_MPU_RDP_KW): \
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case AUX_MPU_RDP_UW: \
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case AUX_MPU_RDP_KW: \
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__is_writable__ = 1; \
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break; \
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default: \
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__is_writable__ = 0; \
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break; \
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} \
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__is_writable__; \
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})
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#define K_MEM_PARTITION_IS_EXECUTABLE(attr) \
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((attr) & (AUX_MPU_RDP_KE | AUX_MPU_RDP_UE))
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#endif /* _ASMLANGUAGE */
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#if CONFIG_ARC_MPU_VER == 2
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#define _ARCH_MEM_PARTITION_ALIGN_CHECK(start, size) \
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BUILD_ASSERT_MSG(!(((size) & ((size) - 1))) && (size) >= STACK_ALIGN \
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&& !((u32_t)(start) & ((size) - 1)), \
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"the size of the partition must be power of 2" \
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" and greater than or equal to the mpu adddress alignment." \
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"start address of the partition must align with size.")
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#elif CONFIG_ARC_MPU_VER == 3
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#define _ARCH_MEM_PARTITION_ALIGN_CHECK(start, size) \
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BUILD_ASSERT_MSG((size) % STACK_ALIGN == 0 && (size) >= STACK_ALIGN \
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&& (u32_t)(start) % STACK_ALIGN == 0, \
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"the size of the partition must align with 32" \
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" and greater than or equal to 32." \
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"start address of the partition must align with 32.")
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#endif
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#endif /* CONFIG_ARC_MPU*/
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#endif /* CONFIG_USERSPACE */
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#ifndef _ASMLANGUAGE
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/* Typedef for the k_mem_partition attribute*/
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typedef u32_t k_mem_partition_attr_t;
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#endif /* _ASMLANGUAGE */
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#ifdef CONFIG_USERSPACE
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#ifndef _ASMLANGUAGE
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/* Syscall invocation macros. arc-specific machine constraints used to ensure
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* args land in the proper registers. Currently, they are all stub functions
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* just for enabling CONFIG_USERSPACE on arc w/o errors.
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*/
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static inline u32_t _arch_syscall_invoke6(u32_t arg1, u32_t arg2, u32_t arg3,
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u32_t arg4, u32_t arg5, u32_t arg6,
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u32_t call_id)
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{
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register u32_t ret __asm__("r0") = arg1;
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register u32_t r1 __asm__("r1") = arg2;
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register u32_t r2 __asm__("r2") = arg3;
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register u32_t r3 __asm__("r3") = arg4;
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register u32_t r4 __asm__("r4") = arg5;
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register u32_t r5 __asm__("r5") = arg6;
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register u32_t r6 __asm__("r6") = call_id;
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compiler_barrier();
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__asm__ volatile(
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"trap_s %[trap_s_id]\n"
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: "=r"(ret)
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: [trap_s_id] "i" (_TRAP_S_CALL_SYSTEM_CALL),
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"r" (ret), "r" (r1), "r" (r2), "r" (r3),
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"r" (r4), "r" (r5), "r" (r6));
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return ret;
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}
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static inline u32_t _arch_syscall_invoke5(u32_t arg1, u32_t arg2, u32_t arg3,
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u32_t arg4, u32_t arg5, u32_t call_id)
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{
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register u32_t ret __asm__("r0") = arg1;
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register u32_t r1 __asm__("r1") = arg2;
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register u32_t r2 __asm__("r2") = arg3;
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register u32_t r3 __asm__("r3") = arg4;
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register u32_t r4 __asm__("r4") = arg5;
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register u32_t r6 __asm__("r6") = call_id;
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compiler_barrier();
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__asm__ volatile(
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"trap_s %[trap_s_id]\n"
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: "=r"(ret)
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: [trap_s_id] "i" (_TRAP_S_CALL_SYSTEM_CALL),
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"r" (ret), "r" (r1), "r" (r2), "r" (r3),
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"r" (r4), "r" (r6));
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return ret;
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}
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static inline u32_t _arch_syscall_invoke4(u32_t arg1, u32_t arg2, u32_t arg3,
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u32_t arg4, u32_t call_id)
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{
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register u32_t ret __asm__("r0") = arg1;
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register u32_t r1 __asm__("r1") = arg2;
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register u32_t r2 __asm__("r2") = arg3;
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register u32_t r3 __asm__("r3") = arg4;
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register u32_t r6 __asm__("r6") = call_id;
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compiler_barrier();
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__asm__ volatile(
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"trap_s %[trap_s_id]\n"
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: "=r"(ret)
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: [trap_s_id] "i" (_TRAP_S_CALL_SYSTEM_CALL),
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"r" (ret), "r" (r1), "r" (r2), "r" (r3),
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"r" (r6));
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return ret;
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}
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static inline u32_t _arch_syscall_invoke3(u32_t arg1, u32_t arg2, u32_t arg3,
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u32_t call_id)
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{
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register u32_t ret __asm__("r0") = arg1;
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register u32_t r1 __asm__("r1") = arg2;
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register u32_t r2 __asm__("r2") = arg3;
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register u32_t r6 __asm__("r6") = call_id;
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compiler_barrier();
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__asm__ volatile(
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"trap_s %[trap_s_id]\n"
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: "=r"(ret)
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: [trap_s_id] "i" (_TRAP_S_CALL_SYSTEM_CALL),
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"r" (ret), "r" (r1), "r" (r2), "r" (r6));
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return ret;
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}
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static inline u32_t _arch_syscall_invoke2(u32_t arg1, u32_t arg2, u32_t call_id)
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{
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register u32_t ret __asm__("r0") = arg1;
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register u32_t r1 __asm__("r1") = arg2;
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register u32_t r6 __asm__("r6") = call_id;
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compiler_barrier();
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__asm__ volatile(
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"trap_s %[trap_s_id]\n"
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: "=r"(ret)
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: [trap_s_id] "i" (_TRAP_S_CALL_SYSTEM_CALL),
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"r" (ret), "r" (r1), "r" (r6));
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return ret;
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}
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static inline u32_t _arch_syscall_invoke1(u32_t arg1, u32_t call_id)
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{
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register u32_t ret __asm__("r0") = arg1;
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register u32_t r6 __asm__("r6") = call_id;
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compiler_barrier();
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__asm__ volatile(
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"trap_s %[trap_s_id]\n"
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: "=r"(ret)
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: [trap_s_id] "i" (_TRAP_S_CALL_SYSTEM_CALL),
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"r" (ret), "r" (r6));
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return ret;
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}
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static inline u32_t _arch_syscall_invoke0(u32_t call_id)
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{
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register u32_t ret __asm__("r0");
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register u32_t r6 __asm__("r6") = call_id;
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compiler_barrier();
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__asm__ volatile(
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"trap_s %[trap_s_id]\n"
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: "=r"(ret)
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: [trap_s_id] "i" (_TRAP_S_CALL_SYSTEM_CALL),
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"r" (ret), "r" (r6));
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return ret;
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}
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static inline int _arch_is_user_context(void)
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{
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u32_t status;
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compiler_barrier();
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__asm__ volatile("lr %0, [%[status32]]\n"
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: "=r"(status)
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: [status32] "i" (_ARC_V2_STATUS32));
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return !(status & _ARC_V2_STATUS32_US);
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}
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#endif /* _ASMLANGUAGE */
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#endif /* CONFIG_USERSPACE */
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#ifdef __cplusplus
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}
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#endif
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#endif /* _ARC_ARCH__H_ */
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