1c8f1cd590
qemu_x86 seems to take an extra instruction after the sti instruction (irq_unlock) happens before it posts the interrupts. This can issues if the instruction after the sti ends up reading the state that is suppose to be updated by the ISR handler. We see this behavior when building with LLVM. To workaround this issue we add an arch_nop() to provide an extra instruction to allow the interrupts to post. Opened zephyrproject-rtos/sdk-ng#629 to track qemu issue. Signed-off-by: Kumar Gala <kumar.gala@intel.com>
125 lines
3.1 KiB
C
125 lines
3.1 KiB
C
/*
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* Copyright (c) 2021 Intel Corporation
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/ztest.h>
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#include <zephyr/interrupt_util.h>
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#include <zephyr/irq.h>
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/*
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* Other arch has already been tested in testcase of gen_isr_table,
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* so we only test x86 series here.
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*/
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#define TEST_IRQ_LINE_1 27
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#define TEST_IRQ_LINE_2 28
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#define TEST_IRQ_PRIO 2
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volatile uint32_t reg_int_executed[2];
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void isr_comm(const void *param)
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{
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int choice = POINTER_TO_INT(param);
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switch (choice) {
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case TEST_IRQ_LINE_1:
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reg_int_executed[0]++;
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break;
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case TEST_IRQ_LINE_2:
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reg_int_executed[1]++;
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break;
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default:
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break;
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}
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}
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/**
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* @brief Test regular interrupt
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*
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* @details Validate regular interrupt works as expected.
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* - Register two regular interrupt at build time.
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* - Trigger interrupt and check if isr handler has executed or not.
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* - Also check irq_enable and irq_disable works.
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*
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* @ingroup kernel_interrupt_tests
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*
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* @see IRQ_CONNECT(), irq_enable(), irq_disable(),
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* irq_unlock(),
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*/
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ZTEST(interrupt_feature, test_isr_regular)
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{
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int trig_vec1, trig_vec2;
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IRQ_CONNECT(TEST_IRQ_LINE_1, TEST_IRQ_PRIO, isr_comm, (void *)TEST_IRQ_LINE_1, 0);
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IRQ_CONNECT(TEST_IRQ_LINE_2, TEST_IRQ_PRIO, isr_comm, (void *)TEST_IRQ_LINE_2, 0);
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trig_vec1 = Z_IRQ_TO_INTERRUPT_VECTOR(TEST_IRQ_LINE_1);
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trig_vec2 = Z_IRQ_TO_INTERRUPT_VECTOR(TEST_IRQ_LINE_2);
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TC_PRINT("irq(%d)=vector(%d)\n", TEST_IRQ_LINE_1, trig_vec1);
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TC_PRINT("irq(%d)=vector(%d)\n", TEST_IRQ_LINE_2, trig_vec2);
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irq_enable(TEST_IRQ_LINE_1);
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irq_enable(TEST_IRQ_LINE_2);
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trigger_irq(trig_vec1);
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zassert_true(reg_int_executed[0] == 1 &&
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reg_int_executed[1] == 0,
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"ISR1 should execute");
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trigger_irq(trig_vec2);
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zassert_true(reg_int_executed[0] == 1 &&
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reg_int_executed[1] == 1,
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"Both ISR should execute");
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unsigned int key = irq_lock();
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/* trigger under irq locked */
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trigger_irq(trig_vec1);
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trigger_irq(trig_vec2);
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zassert_true(reg_int_executed[0] == 1 &&
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reg_int_executed[1] == 1,
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"Both ISR should not execute again(%d)(%d)",
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reg_int_executed[0], reg_int_executed[1]);
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irq_unlock(key);
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#ifdef CONFIG_BOARD_QEMU_X86
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/* QEMU seems to have an issue in that interrupts seem to post on
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* the instruction after the 'sti' that is part of irq_unlock(). This
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* can cause an issue if the instruction after the 'sti' ends up looking
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* at the state that the ISR is suppose to update. This has been shown
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* to happen when building this test for LLVM.
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*
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* Adding a nop instruction allows QEMU to post the ISR before any state
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* gets examined as a workaround.
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*
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* See GitHub issue zephyrproject-rtos/sdk-ng#629 for the qemu bug.
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*/
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arch_nop();
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#endif
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/* interrupt serve after irq unlocked */
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zassert_true(reg_int_executed[0] == 2 &&
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reg_int_executed[1] == 2,
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"Both ISR should execute again(%d)(%d)",
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reg_int_executed[0], reg_int_executed[1]);
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/* trigger after irq unlocked */
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trigger_irq(trig_vec1);
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trigger_irq(trig_vec2);
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zassert_true(reg_int_executed[0] == 3 &&
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reg_int_executed[1] == 3,
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"Both ISR should execute again(%d)(%d)",
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reg_int_executed[0], reg_int_executed[1]);
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}
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