Andrew Boie ec5eb8f7d4 x86: add build assert that RAM bounds <= 4GB ... DTS will fail this first, but there's no cost to adding a second level of defense. Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>		2019-08-07 12:50:53 -07:00
..
arc	arch: arc: add initial support of SMP	2019-08-07 12:21:00 +02:00
arm	userspace: adjust arch memory domain interface	2019-08-05 13:25:50 +02:00
common	cleanup: include/: move misc/__assert.h to sys/__assert.h	2019-06-27 22:55:49 -04:00
nios2	kernel: rename NANO_ESF	2019-07-25 15:06:58 -07:00
posix	thread.c: remove vestigial CONFIG_INIT_STACKS cruft	2019-07-31 09:15:45 +03:00
riscv	riscv: isr.S: fix a missing lw to LR conversion	2019-08-05 21:51:09 +02:00
x86	x86: add build assert that RAM bounds <= 4GB	2019-08-07 12:50:53 -07:00
x86_64	kernel: rename NANO_ESF	2019-07-25 15:06:58 -07:00
xtensa	thread.c: remove vestigial CONFIG_INIT_STACKS cruft	2019-07-31 09:15:45 +03:00
CMakeLists.txt	license: cleanup: add SPDX Apache-2.0 license identifier	2019-04-07 08:45:22 -04:00
Kconfig	riscv32: rename to riscv	2019-08-02 13:54:48 -07:00