zephyr/dts
Michal Sieron bd892bd963 ethernet: eth_liteeth: Add and use register names
Adds addresses and names for individual CSR registers to device tree.
This way liteuart driver no longer depends on CSR data width being 8
bits.
Also when register names or their number changes, then overlay generated
by LiteX will be incompatible with one defined here.
This should make finding breaking changes easier.

I also appended `_ADDR` suffix to defines, to distinguish them from
normal values like `LITEETH_EV_RX`.

Signed-off-by: Michal Sieron <msieron@internships.antmicro.com>
2022-05-06 11:31:54 +02:00
..
arc everywhere: fix typos 2022-03-14 20:22:24 -04:00
arm dts: arm: st: u5: add fdcan to stm32u5 series 2022-05-05 14:35:37 -05:00
arm64 board: arm64: fvp-baser-aemv8r: add all available uart nodes 2022-04-26 14:20:57 -05:00
bindings drivers: pwm: rv32m1: tpm: add pinctrl support 2022-05-05 13:34:39 -05:00
common
nios2 drivers/serial: Extend Altera Jtag Uart driver support 2022-04-07 06:58:16 -04:00
posix
riscv ethernet: eth_liteeth: Add and use register names 2022-05-06 11:31:54 +02:00
sparc dts: sparc: add cpus node to leon3 2022-01-11 10:46:20 +01:00
x86 dts: x86: add CMOS RTC node to common devicetree files 2022-05-04 09:42:26 -05:00
xtensa dts: intel_cavs: cavs15 custom base IP base addrs 2022-05-03 18:50:25 -05:00
binding-template.yaml
Kconfig