Jaxson Han fd231e32e9 arm64: Fix booting issue with FVP V8R >= 11.16.16 ... In the Armv8R AArch64 profile[1], the Armv8R AArch64 is always in secure mode. But the FVP_BaseR_AEMv8R before version 11.16.16 doesn't strictly follow this rule. It still has some non-secure registers (e.g. CNTHP_CTL_EL2). Since version 11.16.16, the FVP_BaseR_AEMv8R has fixed this issue. The CNTHP_XXX_EL2 registers have been changed to CNTHPS_XXX_EL2. So the FVP_BaseR_AEMv8R (version >= 11.16.16) cannot boot Zephyr. This patch will fix it. [1] https://developer.arm.com/documentation/ddi0600/latest/ Signed-off-by: Jaxson Han <jaxson.han@arm.com> Change-Id: If986f34dc080ae7a8b226bba589b6fe616a4260b		2022-03-08 11:09:13 +01:00
..
arc	arc: remove @return doc for void functions	2022-01-12 16:02:16 -05:00
arm/aarch32	arch: arm: aarch32: Change CPU_CORTEX_R kconfig option	2022-02-23 08:14:15 -06:00
arm64	arm64: Fix booting issue with FVP V8R >= 11.16.16	2022-03-08 11:09:13 +01:00
common	include: common: Add sys_set_bits and set_clear_bits inline functions	2021-10-12 08:37:03 -04:00
mips	arch: add MIPS architecture support	2022-01-19 13:48:21 -05:00
nios2	clock: add k_cycle_get_64	2021-11-08 13:41:53 -05:00
posix	linker: update posix linker template, linker.ld	2022-01-07 17:00:28 +01:00
riscv	arch/riscv: Implement arch_curr_cpu()	2022-02-25 19:13:50 -05:00
sparc	clock: add k_cycle_get_64	2021-11-08 13:41:53 -05:00
x86	arch/x86: Add a CPUID function to get initial APIC ID	2022-02-22 10:35:39 -05:00
xtensa	dma/cavs_gpdma: Revert IRQ_CONNECT changes	2022-02-25 22:20:31 -05:00
arch_inlines.h	arch/riscv: Implement arch_curr_cpu()	2022-02-25 19:13:50 -05:00
cpu.h	arch: add MIPS architecture support	2022-01-19 13:48:21 -05:00
structs.h	kernel: add an architecture specific structs header	2021-04-21 09:03:47 -04:00
syscall.h