Conor Paxton dc5cf9cb1c soc: mpfs: describe the correct amount of irqs available. ... Microchip's PolarFire SoC (MPFS) has 186 available interrupts. Fix the Kconfig symbols. While we're at at: remove commented out code Signed-off-by: Conor Paxton <conor.paxton@microchip.com>		2023-12-06 17:54:29 +00:00
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arc	arch: introduce DSP_SHARING and CPU_HAS_DSP configs	2023-11-27 09:05:54 +00:00
arm	soc: atmel_sam0: Setup clocks for USB on SAML21 parts	2023-12-05 16:27:00 -06:00
arm64	drivers: pinctrl: Add R-Car Gen4 support	2023-11-25 08:50:47 -05:00
mips	cmake: mips: update mips SoC to use SOC_LINKER_SCRIPT variable	2023-11-03 11:01:23 +01:00
nios2	cmake: cleanup and simplify the standard include logic in Zephyr	2023-11-06 18:57:30 -05:00
posix	arch posix: annotate posix_exit and nsi_exit as noreturn	2023-11-22 09:52:52 +01:00
riscv	soc: mpfs: describe the correct amount of irqs available.	2023-12-06 17:54:29 +00:00
sparc	cmake: sparc: update sparc SoC to use SOC_LINKER_SCRIPT variable	2023-11-03 11:01:23 +01:00
x86	cmake: x86: update x86 SoC to use SOC_LINKER_SCRIPT variable	2023-11-03 11:01:23 +01:00
xtensa	soc: xtensa: adsp: add support for NXP ADSP for i.MX8ULP	2023-12-04 16:41:00 +00:00
CMakeLists.txt	cmake: enable -Wshadow partially for in-tree code	2023-08-22 11:39:58 +02:00
Kconfig	nrf5x_bsim: Add helper kconfig symbols for simulated nrf5340	2023-09-20 08:56:49 +02:00