Shih-Wei Teng a418b2535b RISC-V: Enhancement for stack size to 16-bytes aligned at least ... If enable CONFIG_PMP_STACK_GUARD, the stack size may not 16-bytes aligned. Enhance this issue. Signed-off-by: Shih-Wei Teng <swteng@andestech.com>		2021-02-24 10:37:03 -05:00
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arc	arch: arc: fix mpu version number	2021-02-24 08:57:35 -05:00
arm	arch: aarch64: Remove useless ISB	2021-02-19 16:26:38 +03:00
common	ARCH: COMMON: split sys_io.h for MMIO & memory bits functions	2020-09-01 13:36:48 +02:00
nios2	license: add missing SPDX headers	2021-02-11 08:05:16 -05:00
posix	Revert "posix: linker: Wrap rodata and rwdata in sections."	2020-09-02 14:46:01 -04:00
riscv	RISC-V: Enhancement for stack size to 16-bytes aligned at least	2021-02-24 10:37:03 -05:00
sparc	arch: sparc: fix memory barrier behavior of arch_irq_*lock	2021-01-26 13:42:17 -05:00
x86	x86: allow linking in virtual address space	2021-02-22 14:55:28 -05:00
xtensa	xtensa: remove core-macros.h from xtensa HAL	2021-01-14 09:40:08 -05:00
arch_inlines.h	headers: Refactor kernel and arch headers.	2019-11-06 16:07:32 -08:00
cpu.h	arch: Add SPARC processor architecture	2020-11-13 14:53:55 -08:00
syscall.h	arch: riscv: add memory protection support	2020-11-09 15:37:11 -05:00