zephyr/tests/kernel/gen_isr_table
Joshua Lilly cce530cae4 scripts: build: gen_isr_tables: make bit masks configurable
Some architectures such as RISC-v support more than 255 interrupts
per aggrigator. This diff adds the ability to forgo the aggrigator
pattern and use a configurable number of bits for multilevel
interruts.

Signed-off-by: Joshua Lilly <jgl@meta.com>
2023-08-10 10:55:41 -04:00
..
boards
src scripts: build: gen_isr_tables: make bit masks configurable 2023-08-10 10:55:41 -04:00
CMakeLists.txt
prj.conf
testcase.yaml scripts: build: gen_isr_tables: make bit masks configurable 2023-08-10 10:55:41 -04:00