Daniel Leung b7eb04b300 x86: consolidate x86_64 architecture, SoC and boards ... There are two set of code supporting x86_64: x86_64 using x32 ABI, and x86 long mode, and this consolidates both into one x86_64 architecture and SoC supporting truly 64-bit mode. () Removes the x86_64:x32 architecture and SoC, and replaces them with the existing x86 long mode arch and SoC. () Replace qemu_x86_64 with qemu_x86_long as qemu_x86_64. () Updates samples and tests to remove reference to qemu_x86_long. () Renames CONFIG_X86_LONGMODE to CONFIG_X86_64. Signed-off-by: Daniel Leung <daniel.leung@intel.com>		2019-10-25 17:57:55 -04:00
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app_smem_aligned.ld
app_smem_unaligned.ld
app_smem.ld
common-ram.ld	sys_sem: straighten build time definition macros	2019-09-14 22:14:51 +08:00
common-rom.ld	LOG_BACKEND_DEFINE(): use Z_STRUCT_SECTION_ITERABLE()	2019-08-06 10:03:13 +02:00
cplusplus-ram.ld	linker: cxx: Include .gcc_except_table sections	2019-09-19 09:26:42 -05:00
cplusplus-rom.ld	linker: cxx: Include .gcc_except_table sections	2019-09-19 09:26:42 -05:00
debug-sections.ld
intlist.ld
kobject-rom.ld
kobject-text.ld	linker: kobject-text.ld: avoid backwards location counter	2019-05-23 06:59:14 -04:00
kobject.ld
linker-defs.h	linker: Add dtcm section for Cortex M7 MCUs	2019-07-19 10:05:46 +02:00
linker-tool-gcc.h	x86: consolidate x86_64 architecture, SoC and boards	2019-10-25 17:57:55 -04:00
linker-tool.h
priv_stacks-noinit.ld	arch: arm: expose start/end limits of the thread priv stack section	2019-06-24 10:16:57 -07:00
priv_stacks-rom.ld
priv_stacks-text.ld
priv_stacks.ld	include: scripts: fix typos in priv_stacks.ld	2019-06-17 10:00:22 -07:00
rel-sections.ld
section_tags.h	linker: Add dtcm section for Cortex M7 MCUs	2019-07-19 10:05:46 +02:00
sections.h	linker: Add dtcm section for Cortex M7 MCUs	2019-07-19 10:05:46 +02:00