Daniel DeGrasse cd4cc7af42 soc: MIMXRT11xx: Enable FlexSPI on MIMXRT11xx ... Enable flexspi for RT11xx SOCs. This requires selecting the correct KConfig symbol for the cortex m4 and m7 SOCs, as well as correcting an error in the flexspi DTS node and updating the clock init for RT11xx SOCs. Note that in addition, the NXP hal must be updated to properly support including the cache management driver for the Cortex M4. Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>		2021-12-09 19:32:45 -05:00
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arc	soc: arc: fix ARC_HAS_ACCL_REGS settings	2021-12-02 11:32:14 -06:00
arm	soc: MIMXRT11xx: Enable FlexSPI on MIMXRT11xx	2021-12-09 19:32:45 -05:00
arm64	xenvm: switch to Xen PV console instead of PL011 SBSA	2021-10-29 15:23:33 +02:00
nios2	soc: nios2: Cleanup linker scripts to use new DTS macros	2020-04-30 20:59:13 -05:00
posix	posix: Add missing include	2021-04-27 13:17:36 -04:00
riscv	linker: remove manual name specification	2021-12-09 16:23:03 +01:00
sparc	boards: set CPU_HAS_FPU on LEON3 soc and boards	2020-12-04 14:33:43 +02:00
x86	bluetooth: remove Kconfig options CONFIG_BT_*_ON_DEV_NAME	2021-08-25 18:05:17 -04:00
xtensa	soc/intel_adsp: Remove interrupt masking from secondary core startup	2021-12-07 12:09:02 -05:00
Kconfig	kconfig: soc and shield cleanup	2021-06-11 16:13:22 +02:00