This sets the dts of dma for using the uart 6 asynch api. The stm32f746 has a dma V1 with request 5 for Tx/Rx usart6 The Tx&Rx pins (PG14, PG9) of the usart6 are connected on the nucleo_f746zg board to pass the test The CONFIG_DCACHE=n must also be set to disable Dcache. Signed-off-by: Francois Ramu <francois.ramu@st.com> |
||
|---|---|---|
| .. | ||
| boards | ||
| src | ||
| CMakeLists.txt | ||
| prj.conf | ||
| testcase.yaml | ||