Zephyr UART drivers offer very low-level functionality. Oftentimes, it would be useful to provide higher-level wrappers around UART device which would offer additional functionality. However, UART driver irq callback routine receives just a pointer to (low-level) UART device, and it's not possible to get to a wrapper structure (without introducing expensive external mapping structures). This is an indirect reason why the current UARt wrappers - uart_pipe, console - are instantiated statically just for one underlying UART device and cannot be reused for multiple devices. Solve this by allowing to pass an arbitrary user data to irq callback, set by new uart_irq_callback_user_data_set() function. Existing uart_irq_callback_set() keeps setting a callback which will receive pointer to the device. While public API maintains compatibility, drivers themselves need to be updated to support arbitrary user data storage/passing (as legacy uart_irq_callback_set() functionality is now implemented in terms of it). Signed-off-by: Paul Sokolovsky <paul.sokolovsky@linaro.org>
456 lines
11 KiB
C
456 lines
11 KiB
C
/*
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* Copyright (c) 2017, Christian Taedcke
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <errno.h>
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#include <uart.h>
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#include <em_usart.h>
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#include <em_gpio.h>
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#include <em_cmu.h>
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#include <soc.h>
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struct uart_gecko_config {
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USART_TypeDef *base;
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CMU_Clock_TypeDef clock;
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u32_t baud_rate;
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struct soc_gpio_pin pin_rx;
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struct soc_gpio_pin pin_tx;
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unsigned int loc;
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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void (*irq_config_func)(struct device *dev);
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#endif
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};
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struct uart_gecko_data {
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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uart_irq_callback_user_data_t callback;
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void *cb_data;
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#endif
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};
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static int uart_gecko_poll_in(struct device *dev, unsigned char *c)
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{
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const struct uart_gecko_config *config = dev->config->config_info;
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u32_t flags = USART_StatusGet(config->base);
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if (flags & USART_STATUS_RXDATAV) {
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*c = USART_Rx(config->base);
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return 0;
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}
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return -1;
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}
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static unsigned char uart_gecko_poll_out(struct device *dev, unsigned char c)
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{
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const struct uart_gecko_config *config = dev->config->config_info;
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USART_Tx(config->base, c);
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return c;
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}
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static int uart_gecko_err_check(struct device *dev)
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{
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const struct uart_gecko_config *config = dev->config->config_info;
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u32_t flags = USART_IntGet(config->base);
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int err = 0;
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if (flags & USART_IF_RXOF) {
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err |= UART_ERROR_OVERRUN;
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}
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if (flags & USART_IF_PERR) {
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err |= UART_ERROR_PARITY;
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}
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if (flags & USART_IF_FERR) {
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err |= UART_ERROR_FRAMING;
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}
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USART_IntClear(config->base, USART_IF_RXOF |
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USART_IF_PERR |
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USART_IF_FERR);
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return err;
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}
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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static int uart_gecko_fifo_fill(struct device *dev, const u8_t *tx_data,
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int len)
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{
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const struct uart_gecko_config *config = dev->config->config_info;
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u8_t num_tx = 0;
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while ((len - num_tx > 0) &&
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(config->base->STATUS & USART_STATUS_TXBL)) {
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config->base->TXDATA = (u32_t)tx_data[num_tx++];
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}
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return num_tx;
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}
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static int uart_gecko_fifo_read(struct device *dev, u8_t *rx_data,
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const int len)
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{
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const struct uart_gecko_config *config = dev->config->config_info;
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u8_t num_rx = 0;
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while ((len - num_rx > 0) &&
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(config->base->STATUS & USART_STATUS_RXDATAV)) {
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rx_data[num_rx++] = (u8_t)config->base->RXDATA;
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}
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return num_rx;
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}
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static void uart_gecko_irq_tx_enable(struct device *dev)
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{
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const struct uart_gecko_config *config = dev->config->config_info;
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u32_t mask = USART_IEN_TXBL | USART_IEN_TXC;
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USART_IntEnable(config->base, mask);
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}
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static void uart_gecko_irq_tx_disable(struct device *dev)
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{
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const struct uart_gecko_config *config = dev->config->config_info;
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u32_t mask = USART_IEN_TXBL | USART_IEN_TXC;
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USART_IntDisable(config->base, mask);
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}
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static int uart_gecko_irq_tx_complete(struct device *dev)
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{
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const struct uart_gecko_config *config = dev->config->config_info;
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u32_t flags = USART_IntGet(config->base);
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USART_IntClear(config->base, USART_IF_TXC);
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return (flags & USART_IF_TXC) != 0;
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}
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static int uart_gecko_irq_tx_ready(struct device *dev)
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{
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const struct uart_gecko_config *config = dev->config->config_info;
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u32_t flags = USART_IntGet(config->base);
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return (flags & USART_IF_TXBL) != 0;
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}
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static void uart_gecko_irq_rx_enable(struct device *dev)
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{
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const struct uart_gecko_config *config = dev->config->config_info;
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u32_t mask = USART_IEN_RXDATAV;
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USART_IntEnable(config->base, mask);
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}
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static void uart_gecko_irq_rx_disable(struct device *dev)
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{
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const struct uart_gecko_config *config = dev->config->config_info;
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u32_t mask = USART_IEN_RXDATAV;
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USART_IntDisable(config->base, mask);
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}
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static int uart_gecko_irq_rx_full(struct device *dev)
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{
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const struct uart_gecko_config *config = dev->config->config_info;
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u32_t flags = USART_IntGet(config->base);
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return (flags & USART_IF_RXDATAV) != 0;
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}
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static int uart_gecko_irq_rx_ready(struct device *dev)
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{
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const struct uart_gecko_config *config = dev->config->config_info;
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u32_t mask = USART_IEN_RXDATAV;
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return (config->base->IEN & mask)
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&& uart_gecko_irq_rx_full(dev);
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}
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static void uart_gecko_irq_err_enable(struct device *dev)
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{
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const struct uart_gecko_config *config = dev->config->config_info;
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USART_IntEnable(config->base, USART_IF_RXOF |
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USART_IF_PERR |
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USART_IF_FERR);
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}
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static void uart_gecko_irq_err_disable(struct device *dev)
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{
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const struct uart_gecko_config *config = dev->config->config_info;
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USART_IntDisable(config->base, USART_IF_RXOF |
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USART_IF_PERR |
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USART_IF_FERR);
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}
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static int uart_gecko_irq_is_pending(struct device *dev)
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{
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return uart_gecko_irq_tx_ready(dev) || uart_gecko_irq_rx_ready(dev);
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}
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static int uart_gecko_irq_update(struct device *dev)
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{
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return 1;
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}
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static void uart_gecko_irq_callback_set(struct device *dev,
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uart_irq_callback_user_data_t cb,
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void *cb_data)
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{
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struct uart_gecko_data *data = dev->driver_data;
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data->callback = cb;
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data->cb_data = cb_data;
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}
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static void uart_gecko_isr(void *arg)
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{
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struct device *dev = arg;
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struct uart_gecko_data *data = dev->driver_data;
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if (data->callback) {
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data->callback(data->cb_data);
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}
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}
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#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
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static void uart_gecko_init_pins(struct device *dev)
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{
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const struct uart_gecko_config *config = dev->config->config_info;
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soc_gpio_configure(&config->pin_rx);
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soc_gpio_configure(&config->pin_tx);
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#if defined(_USART_ROUTEPEN_MASK) || defined(_UART_ROUTEPEN_MASK)
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config->base->ROUTEPEN = USART_ROUTEPEN_RXPEN | USART_ROUTEPEN_TXPEN;
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config->base->ROUTELOC0 = (config->loc << _USART_ROUTELOC0_TXLOC_SHIFT) |
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(config->loc << _USART_ROUTELOC0_RXLOC_SHIFT);
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config->base->ROUTELOC1 = _USART_ROUTELOC1_RESETVALUE;
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#else
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config->base->ROUTE = USART_ROUTE_RXPEN | USART_ROUTE_TXPEN
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| (config->loc << 8);
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#endif
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}
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static int uart_gecko_init(struct device *dev)
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{
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const struct uart_gecko_config *config = dev->config->config_info;
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USART_InitAsync_TypeDef usartInit = USART_INITASYNC_DEFAULT;
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/* The peripheral and gpio clock are already enabled from soc and gpio
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* driver
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*/
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usartInit.baudrate = config->baud_rate;
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/* Enable USART clock */
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CMU_ClockEnable(config->clock, true);
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/* Init USART */
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USART_InitAsync(config->base, &usartInit);
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/* Initialize USART pins */
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uart_gecko_init_pins(dev);
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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config->irq_config_func(dev);
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#endif
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return 0;
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}
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static const struct uart_driver_api uart_gecko_driver_api = {
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.poll_in = uart_gecko_poll_in,
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.poll_out = uart_gecko_poll_out,
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.err_check = uart_gecko_err_check,
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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.fifo_fill = uart_gecko_fifo_fill,
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.fifo_read = uart_gecko_fifo_read,
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.irq_tx_enable = uart_gecko_irq_tx_enable,
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.irq_tx_disable = uart_gecko_irq_tx_disable,
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.irq_tx_complete = uart_gecko_irq_tx_complete,
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.irq_tx_ready = uart_gecko_irq_tx_ready,
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.irq_rx_enable = uart_gecko_irq_rx_enable,
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.irq_rx_disable = uart_gecko_irq_rx_disable,
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.irq_rx_ready = uart_gecko_irq_rx_ready,
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.irq_err_enable = uart_gecko_irq_err_enable,
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.irq_err_disable = uart_gecko_irq_err_disable,
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.irq_is_pending = uart_gecko_irq_is_pending,
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.irq_update = uart_gecko_irq_update,
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.irq_callback_set = uart_gecko_irq_callback_set,
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#endif
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};
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#ifdef CONFIG_UART_GECKO_0
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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static void uart_gecko_config_func_0(struct device *dev);
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#endif
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static const struct uart_gecko_config uart_gecko_0_config = {
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.base = UART0,
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.clock = cmuClock_UART0,
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.baud_rate = CONFIG_UART_GECKO_0_BAUD_RATE,
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.pin_rx = PIN_UART0_RXD,
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.pin_tx = PIN_UART0_TXD,
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.loc = CONFIG_UART_GECKO_0_GPIO_LOC,
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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.irq_config_func = uart_gecko_config_func_0,
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#endif
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};
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static struct uart_gecko_data uart_gecko_0_data;
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DEVICE_AND_API_INIT(uart_0, CONFIG_UART_GECKO_0_NAME,
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&uart_gecko_init,
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&uart_gecko_0_data, &uart_gecko_0_config,
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PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
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&uart_gecko_driver_api);
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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static void uart_gecko_config_func_0(struct device *dev)
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{
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IRQ_CONNECT(UART0_RX_IRQn, CONFIG_UART_GECKO_0_IRQ_PRI,
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uart_gecko_isr, DEVICE_GET(uart_0), 0);
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IRQ_CONNECT(UART0_TX_IRQn, CONFIG_UART_GECKO_0_IRQ_PRI,
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uart_gecko_isr, DEVICE_GET(uart_0), 0);
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irq_enable(UART0_TX_IRQn);
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irq_enable(UART0_RX_IRQn);
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}
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#endif
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#endif /* CONFIG_UART_GECKO_0 */
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#ifdef CONFIG_UART_GECKO_1
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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static void uart_gecko_config_func_1(struct device *dev);
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#endif
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static const struct uart_gecko_config uart_gecko_1_config = {
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.base = UART1,
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.clock = cmuClock_UART1,
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.baud_rate = CONFIG_UART_GECKO_1_BAUD_RATE,
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.pin_rx = PIN_UART1_RXD,
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.pin_tx = PIN_UART1_TXD,
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.loc = CONFIG_UART_GECKO_1_GPIO_LOC,
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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.irq_config_func = uart_gecko_config_func_1,
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#endif
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};
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static struct uart_gecko_data uart_gecko_1_data;
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DEVICE_AND_API_INIT(uart_1, CONFIG_UART_GECKO_1_NAME,
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&uart_gecko_init,
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&uart_gecko_1_data, &uart_gecko_1_config,
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PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
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&uart_gecko_driver_api);
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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static void uart_gecko_config_func_1(struct device *dev)
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{
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IRQ_CONNECT(UART1_RX_IRQn, CONFIG_UART_GECKO_1_IRQ_PRI,
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uart_gecko_isr, DEVICE_GET(uart_1), 0);
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IRQ_CONNECT(UART1_TX_IRQn, CONFIG_UART_GECKO_1_IRQ_PRI,
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uart_gecko_isr, DEVICE_GET(uart_1), 0);
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irq_enable(UART1_RX_IRQn);
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irq_enable(UART1_TX_IRQn);
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}
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#endif
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#endif /* CONFIG_UART_GECKO_1 */
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#ifdef CONFIG_USART_GECKO_0
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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static void usart_gecko_config_func_0(struct device *dev);
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#endif
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static const struct uart_gecko_config usart_gecko_0_config = {
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.base = USART0,
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.clock = cmuClock_USART0,
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.baud_rate = CONFIG_USART_GECKO_0_BAUD_RATE,
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.pin_rx = PIN_USART0_RXD,
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.pin_tx = PIN_USART0_TXD,
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.loc = CONFIG_USART_GECKO_0_GPIO_LOC,
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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.irq_config_func = usart_gecko_config_func_0,
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#endif
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};
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static struct uart_gecko_data usart_gecko_0_data;
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DEVICE_AND_API_INIT(usart_0, CONFIG_USART_GECKO_0_NAME,
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&uart_gecko_init,
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&usart_gecko_0_data, &usart_gecko_0_config,
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PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
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&uart_gecko_driver_api);
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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static void usart_gecko_config_func_0(struct device *dev)
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{
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IRQ_CONNECT(USART0_RX_IRQn, CONFIG_USART_GECKO_0_IRQ_PRI,
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uart_gecko_isr, DEVICE_GET(usart_0), 0);
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IRQ_CONNECT(USART0_TX_IRQn, CONFIG_USART_GECKO_0_IRQ_PRI,
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uart_gecko_isr, DEVICE_GET(usart_0), 0);
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irq_enable(USART0_TX_IRQn);
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irq_enable(USART0_RX_IRQn);
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}
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#endif
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#endif /* CONFIG_USART_GECKO_0 */
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#ifdef CONFIG_USART_GECKO_1
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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static void usart_gecko_config_func_1(struct device *dev);
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#endif
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static const struct uart_gecko_config usart_gecko_1_config = {
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.base = USART1,
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.clock = cmuClock_USART1,
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.baud_rate = CONFIG_USART_GECKO_1_BAUD_RATE,
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.pin_rx = PIN_USART1_RXD,
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.pin_tx = PIN_USART1_TXD,
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.loc = CONFIG_USART_GECKO_1_GPIO_LOC,
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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.irq_config_func = usart_gecko_config_func_1,
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#endif
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};
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static struct uart_gecko_data usart_gecko_1_data;
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DEVICE_AND_API_INIT(usart_1, CONFIG_USART_GECKO_1_NAME,
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&uart_gecko_init,
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&usart_gecko_1_data, &usart_gecko_1_config,
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PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
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&uart_gecko_driver_api);
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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static void usart_gecko_config_func_1(struct device *dev)
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{
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IRQ_CONNECT(USART1_RX_IRQn, CONFIG_USART_GECKO_1_IRQ_PRI,
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uart_gecko_isr, DEVICE_GET(usart_1), 0);
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IRQ_CONNECT(USART1_TX_IRQn, CONFIG_USART_GECKO_1_IRQ_PRI,
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uart_gecko_isr, DEVICE_GET(usart_1), 0);
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irq_enable(USART1_RX_IRQn);
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irq_enable(USART1_TX_IRQn);
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}
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#endif
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#endif /* CONFIG_UART_GECKO_1 */
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