Sebastian Schlupp 0462cc060d soc: same51 and same54: added DFLL48 frequency information ... Specified the value 48000000 for the DFLL48 clock source Signed-off-by: Sebastian Schlupp <sebastian.schlupp@gmail.com>		2023-12-12 16:25:46 +01:00
..
arc	arch: introduce DSP_SHARING and CPU_HAS_DSP configs	2023-11-27 09:05:54 +00:00
arm	soc: same51 and same54: added DFLL48 frequency information	2023-12-12 16:25:46 +01:00
arm64	drivers: pinctrl: Add R-Car Gen4 support	2023-11-25 08:50:47 -05:00
mips	cmake: mips: update mips SoC to use SOC_LINKER_SCRIPT variable	2023-11-03 11:01:23 +01:00
nios2	cmake: cleanup and simplify the standard include logic in Zephyr	2023-11-06 18:57:30 -05:00
posix	soc/posix posix_native_task: Replace native_posix in description	2023-12-07 10:39:31 +00:00
riscv	soc: mpfs: describe the correct amount of irqs available.	2023-12-06 17:54:29 +00:00
sparc	cmake: sparc: update sparc SoC to use SOC_LINKER_SCRIPT variable	2023-11-03 11:01:23 +01:00
x86	cmake: x86: update x86 SoC to use SOC_LINKER_SCRIPT variable	2023-11-03 11:01:23 +01:00
xtensa	intel_adsp: power: clock gating in idle	2023-12-12 10:57:07 +01:00
CMakeLists.txt	cmake: enable -Wshadow partially for in-tree code	2023-08-22 11:39:58 +02:00
Kconfig	nrf5x_bsim: Add helper kconfig symbols for simulated nrf5340	2023-09-20 08:56:49 +02:00