fde31c03c5
The commit fixes the SHA driver because the ROM API has the following changes from ES to QS chip: 1. base addres: from 0x13c -> 0x148 2. required SHA context buffer size : from 228 -> 240 bytes This change also adds a check for the pre-allocated buffer size of the SHA context when the driver initiliazes. Signed-off-by: Jun Lin <CHLin56@nuvoton.com> |
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| .. | ||
| CMakeLists.txt | ||
| crypto_ataes132a_priv.h | ||
| crypto_ataes132a.c | ||
| crypto_intel_sha_priv.h | ||
| crypto_intel_sha_registers.h | ||
| crypto_intel_sha.c | ||
| crypto_it8xxx2_sha.c | ||
| crypto_mchp_xec_symcr.c | ||
| crypto_mcux_dcp.c | ||
| crypto_mtls_shim.c | ||
| crypto_npcx_sha.c | ||
| crypto_nrf_ecb.c | ||
| crypto_smartbond.c | ||
| crypto_stm32_priv.h | ||
| crypto_stm32.c | ||
| crypto_tc_shim_priv.h | ||
| crypto_tc_shim.c | ||
| Kconfig | ||
| Kconfig.ataes132a | ||
| Kconfig.intel | ||
| Kconfig.it8xxx2 | ||
| Kconfig.mcux_dcp | ||
| Kconfig.npcx | ||
| Kconfig.nrf_ecb | ||
| Kconfig.smartbond | ||
| Kconfig.stm32 | ||
| Kconfig.xec | ||