zephyr/soc
Andy Ross c174ade4a1 arch/xtensa: Rework irq_offload: automatic config, SMP-safe
The Xtensa implementation of arch_irq_offload() required that the user
select the correct interrupt manually, and would race with itself if
invoked from separate CPUs (it was saved here by the main
irq_offload() function which has a semaphore to serialize access).

Use the new gen_zsr.py script to automatically detect the highest
available software interrupt, and keep a per-CPU set of
callback/parameter pointers.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2022-02-21 22:10:03 -05:00
..
arc soc: arc: fix ARC_HAS_ACCL_REGS settings 2021-12-02 11:32:14 -06:00
arm soc: npcx: add support for npcx9m7f 2022-02-21 21:56:24 -05:00
arm64 soc: arm64: xenvm: move Kconfig option to soc 2022-02-21 19:35:21 -05:00
mips soc: mips: add Qemu Malta support 2022-01-19 13:48:21 -05:00
nios2
posix
riscv linker: Introduce zephyr,memory-region compatible 2022-02-21 22:02:04 -05:00
sparc
x86 bluetooth: remove Kconfig options CONFIG_BT_*_ON_DEV_NAME 2021-08-25 18:05:17 -04:00
xtensa arch/xtensa: Rework irq_offload: automatic config, SMP-safe 2022-02-21 22:10:03 -05:00
Kconfig kconfig: soc and shield cleanup 2021-06-11 16:13:22 +02:00