6dfb16a3d9
This file started using ALWAYS_INLINE from <toolchain.h> but didn't include it. Transitive inclusions were hiding the problem most places, but at least one test case exposes it. Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
86 lines
2.0 KiB
C
86 lines
2.0 KiB
C
/*
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* Copyright 2021 Intel Corporation
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef ZEPHYR_INCLUDE_ARCH_XTENSA_CACHE_H_
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#define ZEPHYR_INCLUDE_ARCH_XTENSA_CACHE_H_
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#include <xtensa/config/core-isa.h>
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#include <toolchain.h>
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#include <sys/util.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define Z_DCACHE_MAX (XCHAL_DCACHE_SIZE / XCHAL_DCACHE_WAYS)
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#if XCHAL_DCACHE_SIZE
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#define Z_IS_POW2(x) (((x) != 0) && (((x) & ((x)-1)) == 0))
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BUILD_ASSERT(Z_IS_POW2(XCHAL_DCACHE_LINESIZE));
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BUILD_ASSERT(Z_IS_POW2(Z_DCACHE_MAX));
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#endif
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static ALWAYS_INLINE void z_xtensa_cache_flush(void *addr, size_t bytes)
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{
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#if XCHAL_DCACHE_SIZE
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size_t step = XCHAL_DCACHE_LINESIZE;
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size_t first = ROUND_DOWN(addr, step);
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size_t last = ROUND_UP(((long)addr) + bytes, step);
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size_t line;
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for (line = first; bytes && line < last; line += step) {
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__asm__ volatile("dhwb %0, 0" :: "r"(line));
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}
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#endif
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}
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static ALWAYS_INLINE void z_xtensa_cache_flush_inv(void *addr, size_t bytes)
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{
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#if XCHAL_DCACHE_SIZE
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size_t step = XCHAL_DCACHE_LINESIZE;
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size_t first = ROUND_DOWN(addr, step);
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size_t last = ROUND_UP(((long)addr) + bytes, step);
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size_t line;
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for (line = first; bytes && line < last; line += step) {
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__asm__ volatile("dhwbi %0, 0" :: "r"(line));
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}
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#endif
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}
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static ALWAYS_INLINE void z_xtensa_cache_inv(void *addr, size_t bytes)
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{
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#if XCHAL_DCACHE_SIZE
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size_t step = XCHAL_DCACHE_LINESIZE;
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size_t first = ROUND_DOWN(addr, step);
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size_t last = ROUND_UP(((long)addr) + bytes, step);
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size_t line;
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for (line = first; bytes && line < last; line += step) {
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__asm__ volatile("dhi %0, 0" :: "r"(line));
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}
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#endif
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}
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static ALWAYS_INLINE void z_xtensa_cache_inv_all(void)
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{
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z_xtensa_cache_inv(NULL, Z_DCACHE_MAX);
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}
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static ALWAYS_INLINE void z_xtensa_cache_flush_all(void)
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{
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z_xtensa_cache_flush(NULL, Z_DCACHE_MAX);
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}
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static ALWAYS_INLINE void z_xtensa_cache_flush_inv_all(void)
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{
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z_xtensa_cache_flush_inv(NULL, Z_DCACHE_MAX);
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}
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#ifdef __cplusplus
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} /* extern "C" */
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#endif
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#endif /* ZEPHYR_INCLUDE_ARCH_XTENSA_CACHE_H_ */
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