zephyr/subsys/debug/coredump
Lauren Murphy c1711997bc debug: coredump: add xtensa coredump
Adds Xtensa as supported architecture for coredump. Fixes
a few typos in documentation, Kconfig and a C file. Dumps
minimal set of registers shown by 'info registers' in GDB
for the sample_controller and ESP32 SOCs. Updates tests.

Signed-off-by: Lauren Murphy <lauren.murphy@intel.com>
2021-12-14 07:40:55 -05:00
..
CMakeLists.txt debug: coredump: add new backend using flash partition 2021-01-21 22:08:59 -05:00
coredump_backend_flash_partition.c debug: coredump: add xtensa coredump 2021-12-14 07:40:55 -05:00
coredump_backend_logging.c coredump_log: coredump log in panic mode 2021-09-29 14:50:12 -04:00
coredump_core.c debug: coredump: remove z_ prefix for stuff used outside subsys 2021-01-21 22:08:59 -05:00
coredump_internal.h debug: coredump: add new backend using flash partition 2021-01-21 22:08:59 -05:00
coredump_memory_regions.c
Kconfig debug: coredump: add new backend using flash partition 2021-01-21 22:08:59 -05:00