f8f2936dba
This adds : - Generic PCIe Controller layer implementing the current PCIe API - Generic PCIe Controller in ECAM mode driver The Generic PCIe Controller layer provides: - Configuration space read/write - single bus endpoint enumerations - Endpoint I/O, MEM & MEM64 BARs allocation - Endpoint I/O, MEM & MEM64 BARs get & translation for drivers The Generic PCIe Controller in ECAM mode driver provides: - Raw DT RANGES properties into usable PCIe regions - Configuration space read/write into ECAM config space - PCIe regions allocation & translation The limitations are: - No support for PCIe prefetchable regions - No support for PCIe bus configuration (only bus0 is supported) - No support for multiple controllers (no domain-id in BDF) Support has been designed to initially support Root Complexes with Root Complex Integrated Endpoint, which was designed for Embedded Systems with internal-only PCIe Endpoints on bus 0. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> |
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| .. | ||
| endpoint | ||
| cap.h | ||
| controller.h | ||
| msi.h | ||
| pcie.h | ||
| ptm.h | ||