Mahesh Mahadevan e5ecc96b3c dts: spi: Interrupts in NXP LPSPI is no longer a required property ... Some NXP SoC's have a FlexComm interface that manages the interrupts. Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>		2024-03-26 16:39:18 -04:00
..
arc/synopsys	drivers: spi: dw: define max-xfer-size	2024-01-20 13:11:42 +01:00
arm	dts: mcxn947: Add edma nodes	2024-03-26 16:39:18 -04:00
arm64	dts: nxp: imx93: add nodes for SAI3 and EDMA4	2024-03-20 15:42:55 +01:00
bindings	dts: spi: Interrupts in NXP LPSPI is no longer a required property	2024-03-26 16:39:18 -04:00
common	dts: Remove support for nRF54H20 EngA	2024-03-18 19:11:36 +00:00
nios2/intel
posix
riscv	dts: opentitan: update plic interrupt count to match spec	2024-03-22 09:23:46 +00:00
sparc/gaisler	soc/gr716a: Enable SPIMCTRL support on LEON GR716A	2024-02-01 14:06:38 +01:00
x86/intel	hwmv2: Introduce Hardware model version 2 and convert devices	2024-03-02 16:56:33 -05:00
xtensa	dts: intel_adsp: ace: update host dma copy alignment	2024-03-26 09:40:11 +00:00
binding-template.yaml
Kconfig	dts: drop HAS_DTS	2023-10-20 12:18:17 -07:00