82403f68e2
A common driver is shared between stm32 chips, which was not the case for stm32f3 series. As a consequence stm32f3 was not maintained equally and was missing features such as flash layout or dts based configuration. Besides, drivers had some flows such as wrong bus clock and missing HSI clock activation which lead to issues on boards not using HSI as main clock. As a consequence this commit moves stm32f3 series flash driver to common stm32 flash drivers. Fixes #4197 Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
74 lines
2.1 KiB
C
74 lines
2.1 KiB
C
/*
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* Copyright (c) 2017 Linaro Limited
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* Copyright (c) 2017 BayLibre, SAS.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef ZEPHYR_DRIVERS_FLASH_FLASH_STM32_H_
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#define ZEPHYR_DRIVERS_FLASH_FLASH_STM32_H_
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#include <flash_registers.h>
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#if defined(CONFIG_SOC_SERIES_STM32L4X) || \
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defined(CONFIG_SOC_SERIES_STM32F0X) || \
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defined(CONFIG_SOC_SERIES_STM32F3X)
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#include <clock_control.h>
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#include <clock_control/stm32_clock_control.h>
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#endif
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struct flash_stm32_priv {
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#if defined(CONFIG_SOC_SERIES_STM32F0X)
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struct stm32f0x_flash *regs;
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/* clock subsystem driving this peripheral */
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struct stm32_pclken pclken;
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#elif defined(CONFIG_SOC_SERIES_STM32F3X)
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struct stm32f3x_flash *regs;
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/* clock subsystem driving this peripheral */
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struct stm32_pclken pclken;
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#elif defined(CONFIG_SOC_SERIES_STM32F4X)
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struct stm32f4x_flash *regs;
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#elif defined(CONFIG_SOC_SERIES_STM32F7X)
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struct stm32f7x_flash *regs;
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#elif defined(CONFIG_SOC_SERIES_STM32L4X)
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struct stm32l4x_flash *regs;
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/* clock subsystem driving this peripheral */
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struct stm32_pclken pclken;
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#endif
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struct k_sem sem;
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};
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#define FLASH_STM32_PRIV(dev) ((struct flash_stm32_priv *)((dev)->driver_data))
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#define FLASH_STM32_REGS(dev) (FLASH_STM32_PRIV(dev)->regs)
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#ifdef CONFIG_FLASH_PAGE_LAYOUT
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static inline bool flash_stm32_range_exists(struct device *dev,
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off_t offset,
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u32_t len)
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{
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struct flash_pages_info info;
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return !(flash_get_page_info_by_offs(dev, offset, &info) ||
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flash_get_page_info_by_offs(dev, offset + len - 1, &info));
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}
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#endif /* CONFIG_FLASH_PAGE_LAYOUT */
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bool flash_stm32_valid_range(struct device *dev, off_t offset,
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u32_t len, bool write);
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int flash_stm32_write_range(struct device *dev, unsigned int offset,
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const void *data, unsigned int len);
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int flash_stm32_block_erase_loop(struct device *dev, unsigned int offset,
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unsigned int len);
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int flash_stm32_wait_flash_idle(struct device *dev);
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#ifdef CONFIG_FLASH_PAGE_LAYOUT
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void flash_stm32_page_layout(struct device *dev,
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const struct flash_pages_layout **layout,
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size_t *layout_size);
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#endif
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#endif /* ZEPHYR_DRIVERS_FLASH_FLASH_STM32_H_ */
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