zephyr/arch
Peter Marheine d400b8135c arch/riscv: support CONFIG_CODE_DATA_RELOCATION
This implements support for relocating code to chosen memory regions via
the `zephyr_code_relocate` CMake function for RISC-V SoCs. ARM-specific
assumptions that were made by gen_relocate_app.py need to be corrected,
in particular not assuming any particular name for the default RAM
section (which is 'SRAM' for most ARM pltaforms) and not assuming 32-bit
pointers (so the test works on RV64).

Signed-off-by: Peter Marheine <pmarheine@chromium.org>
2022-08-24 10:08:06 +02:00
..
arc cache: Fix cache API calling from userspace 2022-08-23 10:14:17 +02:00
arm arch: move CODE_DATA_RELOCATION to top level 2022-08-24 10:08:06 +02:00
arm64 cache: Fix cache API calling from userspace 2022-08-23 10:14:17 +02:00
common gen_isr_tables.py: Move to scripts directory 2022-07-07 17:58:34 +00:00
mips arch: mips: add mising braces to single line if statements 2022-07-06 11:00:45 -04:00
nios2 arch: comply to coding guidelines MISRA C:2012 Rule 14.4 2022-07-20 09:28:38 -05:00
posix arch/posix: Add MemorySanitizer support 2022-08-19 08:30:01 +02:00
riscv arch: riscv: Align semihost_exec function at 16-byte boundary 2022-08-08 10:52:34 +02:00
sparc SPARC: reduce z_thread_entry_wrapper 2022-08-03 12:05:49 +02:00
x86 devices: constify statically initialized device pointers 2022-08-19 11:51:26 +02:00
xtensa intel_adsp: meteorlake: Initialize stack flush pointer SR 2022-07-25 16:00:22 -04:00
CMakeLists.txt
Kconfig arch/riscv: support CONFIG_CODE_DATA_RELOCATION 2022-08-24 10:08:06 +02:00