Patryk Duda d6f8e9ae5b drivers: reset: Introduce STM32 reset controller ... This driver exposes STM32 RCC reset functionality through reset API. Information about RCC register offset and bit is encoded just like GD32. The first 5 least significant bits contains register bit number. Next 12 bits are used to keep RCC register offset. Remaining bits are unused. Signed-off-by: Patryk Duda <pdk@semihalf.com>		2022-12-09 09:43:36 -08:00
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CMakeLists.txt	drivers: reset: Introduce STM32 reset controller	2022-12-09 09:43:36 -08:00
Kconfig	drivers: reset: Introduce STM32 reset controller	2022-12-09 09:43:36 -08:00
Kconfig.aspeed	drivers: reset: add Aspeed AST10x0 reset control	2022-12-05 14:36:16 +01:00
Kconfig.gd32
Kconfig.rpi_pico
Kconfig.stm32	drivers: reset: Introduce STM32 reset controller	2022-12-09 09:43:36 -08:00
reset_ast10x0.c	drivers: reset: add Aspeed AST10x0 reset control	2022-12-05 14:36:16 +01:00
reset_gd32.c
reset_rpi_pico.c	include: add missing limits.h include	2022-10-11 18:05:17 +02:00
reset_stm32.c	drivers: reset: Introduce STM32 reset controller	2022-12-09 09:43:36 -08:00