e5caae8e0a
This CL introduces a kernel device driver implemented by the internal 64/32-bit timers in Nuvoton NPCX series. Via these two kinds of timer, the driver provides an standard "system clock driver" interface. It includes: - A system timer based on an ITIM64 (Internal 64-bit timer) instance, clocked by APB2 which freq is CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC. - Its prescaler is set to 1 and provide the kernel cycles reading without handling overflow mechanism. - A event timer based on an ITIM32 (Internal 32-bit timer) instance, clocked by LCLK which frequency is 32KHz and still activated when ec entered "idle/deep idle" power state for better power consumption. - Its prescaler is set to 1 and provide timeout event mechansim. - Compensate system timer which clock is gating for better power consumption after ec left"idle/deep idle" power state. This CL passed starve, timer_api, and timer_monotonic test suites. Signed-off-by: Mulin Chao <mlchao@nuvoton.com> |
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| .. | ||
| arm,armv8-timer.yaml | ||
| arm,cmsdk-dtimer.yaml | ||
| arm,cmsdk-timer.yaml | ||
| atmel,sam0-tc32.yaml | ||
| gaisler,gptimer.yaml | ||
| intel,hpet.yaml | ||
| ite,it8xxx2-timer.yaml | ||
| litex,timer0.yaml | ||
| microchip,xec-rtos-timer.yaml | ||
| nordic,nrf-timer.yaml | ||
| nuvoton,npcx-itim-timer.yaml | ||
| nxp,imx-gpt.yaml | ||
| openisa,rv32m1-lptmr.yaml | ||
| st,stm32-lptim.yaml | ||
| st,stm32-timers.yaml | ||
| xlnx,ttcps.yaml | ||