zephyr

History

Peter Marheine d400b8135c arch/riscv: support CONFIG_CODE_DATA_RELOCATION This implements support for relocating code to chosen memory regions via the `zephyr_code_relocate` CMake function for RISC-V SoCs. ARM-specific assumptions that were made by gen_relocate_app.py need to be corrected, in particular not assuming any particular name for the default RAM section (which is 'SRAM' for most ARM pltaforms) and not assuming 32-bit pointers (so the test works on RV64). Signed-off-by: Peter Marheine <pmarheine@chromium.org>		2022-08-24 10:08:06 +02:00
..
src	arch/riscv: support CONFIG_CODE_DATA_RELOCATION	2022-08-24 10:08:06 +02:00
CMakeLists.txt	arch/riscv: support CONFIG_CODE_DATA_RELOCATION	2022-08-24 10:08:06 +02:00
custom-sections.ld
Kconfig	arch/riscv: support CONFIG_CODE_DATA_RELOCATION	2022-08-24 10:08:06 +02:00
linker_arm_sram2.ld
linker_riscv_qemu_sram2.ld	arch/riscv: support CONFIG_CODE_DATA_RELOCATION	2022-08-24 10:08:06 +02:00
prj_riscv.conf	arch/riscv: support CONFIG_CODE_DATA_RELOCATION	2022-08-24 10:08:06 +02:00
prj.conf
README.rst
testcase.yaml	arch/riscv: support CONFIG_CODE_DATA_RELOCATION	2022-08-24 10:08:06 +02:00

README.rst

.. _code_relocation:

Code relocation
#################

Overview
********
A simple example that demonstrates how relocation of code, data or bss sections
using a custom linker script.