d397a91c62
The intent of arch_coprocessors_disable() is to replace arch_float_disable() in halt_thread() for the FPU will not always be the only coprocessor that will need to be disabled. Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
59 lines
1.7 KiB
C
59 lines
1.7 KiB
C
/*
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* Copyright (c) 2021 KT-Elektronik, Klaucke und Partner GmbH
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* Copyright (c) 2024 Renesas Electronics Corporation
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/kernel.h>
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#include <kernel_internal.h>
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#include <ksched.h>
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#include <zephyr/logging/log.h>
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LOG_MODULE_DECLARE(os, CONFIG_KERNEL_LOG_LEVEL);
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/* variables to store the arguments of z_rx_context_switch_isr() (zephyr\arch\rx\core\switch.S)
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* when performing a cooperative thread switch. In that case, z_rx_context_switch_isr() triggerss
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* unmaskable interrupt 1 to actually perform the switch. The ISR to interrupt 1
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* (switch_isr_wrapper()) reads the arguments from these variables.
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*/
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void *coop_switch_to;
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void **coop_switched_from;
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void arch_new_thread(struct k_thread *thread, k_thread_stack_t *stack, char *stack_ptr,
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k_thread_entry_t entry, void *arg1, void *arg2, void *arg3)
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{
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struct arch_esf *iframe;
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iframe = Z_STACK_PTR_TO_FRAME(struct arch_esf, stack_ptr);
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/* initial value for the PSW (bits U and I are set) */
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iframe->psw = 0x30000;
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/* the initial entry point is the function z_thread_entry */
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iframe->entry_point = (uint32_t)z_thread_entry;
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/* arguments for the call of z_thread_entry (to be written to r1-r4) */
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iframe->r1 = (uint32_t)entry;
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iframe->r2 = (uint32_t)arg1;
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iframe->r3 = (uint32_t)arg2;
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iframe->r4 = (uint32_t)arg3;
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/* for debugging: */
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iframe->r5 = 5;
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iframe->r6 = 6;
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iframe->r7 = 7;
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iframe->r8 = 8;
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iframe->r9 = 9;
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iframe->r10 = 10;
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iframe->r11 = 11;
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iframe->r12 = 12;
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iframe->r13 = 13;
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iframe->r14 = 14;
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iframe->r15 = 15;
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iframe->acc_l = 16;
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iframe->acc_h = 17;
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thread->switch_handle = (void *)iframe;
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}
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int arch_coprocessors_disable(struct k_thread *thread)
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{
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return -ENOTSUP;
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}
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