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zephyr/dts/bindings/interrupt-controller
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Michael Hope b99b7d14f1 drivers: interrupt_controller: add a WCH EXTI external interrupt driver 
The WCH External Trigger and Interrupt controller (EXTI) supports
between 8 and 22 lines where each line can trigger an interrupt on
rising edge, falling edge, or both edges. Lines are assigned to a
group, and each group has a separate interrupt. On the CH32V003/6,
there is one group of 8 lines, while on the CH32V208 there are
multiple groups with between one and six lines per group.

In the same way as the STM32 and GD32, define an EXTI driver that
configures the peripheral and an internal interface that can configure
individual lines.

Signed-off-by: Michael Hope <michaelh@juju.nz>
2025-06-26 09:38:56 +02:00
..
andestech,nceplic100.yaml dts: add andestech,nceplic100 binding 2024-10-09 09:41:50 +02:00
arm,gic-v1.yaml
arm,gic-v2.yaml
arm,gic-v3-its.yaml
arm,gic-v3.yaml drivers: gic: Add multiple GIC redistributors regions support 2025-01-21 11:16:12 +01:00
arm,gic.yaml
arm,v6m-nvic.yaml
arm,v7m-nvic.yaml
arm,v8.1m-nvic.yaml
arm,v8m-nvic.yaml
atmel,sam0-eic.yaml
cdns,xtensa-core-intc.yaml
cypress,psoc6-intmux-ch.yaml
cypress,psoc6-intmux.yaml Documentation: Update documenation for Infineon boards 2024-11-14 20:36:38 -06:00
espressif,esp32-intc.yaml
gaisler,irqmp.yaml
gd,gd32-exti.yaml
infineon,xmc4xxx-intc.yaml
intel,ace-intc.yaml
intel,cavs-intc.yaml
intel,ioapic.yaml
intel,loapic.yaml
intel,vt-d.yaml
interrupt-controller.yaml
ite,it8xxx2-intc-v2.yaml
ite,it8xxx2-intc.yaml
ite,it8xxx2-wuc-map.yaml
ite,it8xxx2-wuc.yaml
ite,it51xxx-intc.yaml drivers/interrupt: Add interrupt and wake-up control drivers of it51xxx 2025-04-08 10:48:26 +02:00
ite,it51xxx-wuc-map.yaml drivers/interrupt: Add interrupt and wake-up control drivers of it51xxx 2025-04-08 10:48:26 +02:00
ite,it51xxx-wuc.yaml drivers/interrupt: Add interrupt and wake-up control drivers of it51xxx 2025-04-08 10:48:26 +02:00
litex,vexriscv-intc0.yaml
mediatek,adsp_intc.yaml
microchip,xec-ecia-girq.yaml
microchip,xec-ecia.yaml
mti,cpu-intc.yaml
nordic,nrf-clic.yaml
nuclei,eclic.yaml
nuvoton,npcx-miwu-int-map.yaml
nuvoton,npcx-miwu-wui-map.yaml
nuvoton,npcx-miwu.yaml
nxp,irqsteer-intc.yaml
nxp,irqsteer-master.yaml
nxp,pint.yaml
nxp,s32-siul2-eirq.yaml
nxp,s32-wkpu.yaml
openisa,rv32m1-event-unit.yaml
openisa,rv32m1-intmux-ch.yaml
openisa,rv32m1-intmux.yaml
renesas,rx-icu.yaml goc: renesas: rx: Initial support for RX130 SOC 2025-05-02 09:18:16 +02:00
renesas,rz-ext-irq.yaml drivers: interrupt controller: Add support for RZ/N2L 2025-03-14 09:23:50 +01:00
riscv,clic.yaml dts: bindings: interrupt-controller: add riscv,clic yaml 2025-04-04 14:55:50 +02:00
riscv,cpu-intc.yaml
riscv,plic0.yaml
shared-irq.yaml
sifive,clint0.yaml drivers: timer: Harmonize mtime-based RISC-V timers 2025-01-22 05:39:59 +01:00
sifive,plic-1.0.0.yaml
snps,archs-idu-intc.yaml
snps,arcv2-intc.yaml
snps,designware-intc.yaml
st,stm32-exti.yaml dts: stm32: Streamline Devicetree binding descriptions 2025-03-04 21:55:54 +01:00
st,stm32g0-exti.yaml dts: stm32: Streamline Devicetree binding descriptions 2025-03-04 21:55:54 +01:00
st,stm32h7rs-exti.yaml dts: stm32: Streamline Devicetree binding descriptions 2025-03-04 21:55:54 +01:00
st,stm32wb0-gpio-intc.yaml dts: bindings: intc: add STM32WB0 GPIO interrupt controller 2024-09-12 10:03:37 +02:00
swerv,pic.yaml
sy1xx,event-unit.yaml driver: timer: Add support for sy1xx 2024-09-16 20:19:31 +02:00
ti,vim.yaml
wch,exti.yaml drivers: interrupt_controller: add a WCH EXTI external interrupt driver 2025-06-26 09:38:56 +02:00
wch,pfic.yaml drivers: add the pfic interrupt controller 2024-11-26 14:41:46 +00:00