Michael Hope c1c0413eed drivers: add the ch32v00x clock controller ... This commit adds the clock driver for WCH CH32V003. Signed-off-by: Michael Hope <michaelh@juju.nz> Signed-off-by: Dhiru Kholia <dhiru.kholia@gmail.com>		2024-11-26 14:41:46 +00:00
..
andes	dts/andes: adjust the sizes of PLIC nodes	2024-10-31 14:17:02 -05:00
efinix	dts: riscv: Fix incorrect plic size	2024-07-02 22:21:17 -04:00
espressif	boards: esp32xx: Use common partition tables	2024-11-22 17:45:24 +01:00
gd
ite	driver: spi: support it8xxx2 spi driver	2024-11-16 15:20:51 -05:00
lowrisc	dts: opentitan: update plic interrupt count to match spec	2024-03-22 09:23:46 +00:00
microchip	dts: mbox: add PolarFire SoC mailbox interface	2024-02-01 04:33:16 -05:00
niosv
nordic	soc: nordic: Introduce the nRF54L05 and nRF54L10	2024-11-21 09:26:38 +01:00
openisa	soc/openisa: enable the C extension	2024-07-03 15:06:14 -04:00
qemu	dts: set the riscv,isa property for virt-based targets	2024-05-15 09:30:23 +02:00
sensry	board: sensry: Add support for sy1xx	2024-09-16 20:19:31 +02:00
sifive	boards: hifive_unmatched: add support for S7 and U74 targets	2024-11-20 10:15:03 +00:00
starfive	dts: jh7110: fix memory definitions	2024-04-09 14:20:39 +02:00
telink
wch	drivers: add the ch32v00x clock controller	2024-11-26 14:41:46 +00:00
neorv32.dtsi
renode_riscv32_virt.dtsi
riscv32-litex-vexriscv.dtsi	drivers: watchdog: litex: add litex watchdog	2024-08-19 10:02:01 -04:00