e0c56f1998
These devices have a somewhat odd hybrid design, with a free-running 64 bit up counter but no comparator. Instead interrupts are triggered by (one of an array of) 32 bit down counters with reset (a-la SysTick, but without the 24 bit precision issues). The combination actually results in a fairly simple driver as we can skip the comparator rounding math. Signed-off-by: Andy Ross <andyross@google.com>
12 lines
354 B
Plaintext
12 lines
354 B
Plaintext
# Copyright 2023 The ChromiumOS Authors
|
|
# SPDX-License-Identifier: Apache-2.0
|
|
|
|
config MTK_ADSP_TIMER
|
|
bool "MediaTek Audio DSP timer"
|
|
select TICKLESS_CAPABLE
|
|
select TIMER_HAS_64BIT_CYCLE_COUNTER
|
|
select SYSTEM_CLOCK_LOCK_FREE_COUNT
|
|
help
|
|
MediaTek MT81xx Audio DSPs have a 13 Mhz wall clock timer
|
|
for system time that is independent of CPU speed.
|