Dat Nguyen Duy 2b2b41d775 arch: arm: cortex_a_r: add Kconfig options for cache segregation ... On Arm Cortex R52, cache segregation policy controls the number of L1 I/D cache ways that are allocated to Flash and AXIM interface. Adding Kconfig options for configuring it. Writing to IMP_CSCTRL is only permitted before the caches have been enabled, following a system reset. Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>		2024-11-26 15:43:45 -05:00
..
cortex_a_r	arch: arm: cortex_a_r: add Kconfig options for cache segregation	2024-11-26 15:43:45 -05:00
cortex_m	arch: deprecate _current	2024-11-23 20:12:24 -05:00
mmu
mpu	arch: arm: fix null pointer dereference check test	2024-10-26 03:58:05 +01:00
offsets	arch: arm: cortex_m: pm_s2ram: add support for all architectures	2024-11-16 14:00:44 -05:00
__aeabi_atexit.c
CMakeLists.txt
elf.c	llext: Move arm-specific relocation names from generic LLEXT file	2024-09-12 14:48:55 +02:00
fatal.c	coredump: ARM: Ensure sp in dump is set as gdb expects	2024-11-06 10:17:59 -08:00
gdbstub.c	arch: define struct arch_esf and deprecate z_arch_esf_t	2024-06-04 14:02:51 -05:00
header.S
irq_offload.c	arch: initialize irq_offload during boot, do not use SYS_INIT	2024-09-17 20:05:22 -04:00
Kconfig	arch: arm: do not enable PLATFORM_SPECIFIC_INIT if SOC_RESET_HOOK=y	2024-09-16 15:12:18 -04:00
Kconfig.vfp
nmi_on_reset.S
nmi.c
swi_tables.ld	arch: arm, arm64: Remove zephyr prefix from linker includes	2024-02-05 12:32:46 +01:00
tls.c
userspace.S
vector_table.ld	arch: arm, arm64: Remove zephyr prefix from linker includes	2024-02-05 12:32:46 +01:00
zimage_header.ld