zephyr/include/arch
Max Filippov ac430f9595 xtensa: conditionally define endianness macros
__BYTE_ORDER__, __ORDER_BIG_ENDIAN__ and __ORDER_LITTLE_ENDIAN__ are not
defined when building with xcc, but are defined when building with gcc.
Define them conditionally.

Change-Id: Ib205ffee28360aa240d61731b7a3d6f45401b4c1
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2017-04-13 20:33:27 +00:00
..
arc Revert "sys_bitfield*(): use 'void *' instead of memaddr_t" 2017-02-28 16:06:22 -05:00
arm arm: cortex-m: allow configurable ROM offset 2017-02-22 18:08:57 -06:00
nios2 kernel: remove remaining microkernel references 2017-04-10 20:21:05 +00:00
riscv32 riscv32: added support for the SiFive Freedom E310 SOC 2017-04-02 15:15:07 +00:00
x86 kernel: remove all remaining references to nanokernel 2017-04-10 20:21:10 +00:00
xtensa xtensa: conditionally define endianness macros 2017-04-13 20:33:27 +00:00
cpu.h Xtensa port: Added support in arch/cpu.h for Xtensa cores. 2017-02-13 08:04:27 -08:00